ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING - PowerPoint PPT Presentation

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ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING

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  1. ROCHESTER INSTITUTE OF TECHNOLOGYMICROELECTRONIC ENGINEERING • Bulk Micromachined Laboratory Project • Dr. Lynn Fuller, • Ivan Puchades • Webpage: http://people.rit.edu/lffeee • Rochester Institute of Technology • 82 Lomb Memorial Drive • Rochester, NY 14623-5604 • Tel (585) 475-2035 • Fax (585) 475-5041 • Email: Lynn.Fuller@rit.edu • Department webpage: http://www.microe.rit.edu Rev. 3-10-2008 MEM_BULK_2007_08.ppt

  2. OUTLINE Lab Project Expectations Lab requirements Design considerations Maskmaking Testing Approach Test Results

  3. LAB PROJECT EXPECTATIONS • Objective: design, fabricate and test a MEMS device utilizing the provided process flow. • Lab project is 50% of grade • Meet all required project timelines 33% • Weekly attendance and participation 33% • Quality of work 33% • Project timelines • Design calculations and 1st Draft layout design 2rd week • Final layout design in dropbox 3rd week • Report theory section and test plan 5th week • Final presentation 11th week • Final report 11th week

  4. LAB REQUIREMENS AND TOOLS • Design: • Mentor graphics IC Layout in CE VLSI lab • Account to be provided by TA during second week • Review mems_cad bulk_20072.pdf posted on http://people.rit.edu/lffeee/emcr870.htm • Fabrication • Complete safety training and pass safety exam by 3rd week • http://smfl.microe.rit.edu/events.php • Complete your lab notebook, sign each page, date each page, diary format, comments and observations, etc. • Fabrication schedule will be reviewed and emailed to students on Fridays. • Email TA (ixp6782@rit.edu) with available hours during the week. One 3-hour block (AM or PM) is required per week plus the 1 hour review session on Friday at 1:00pm

  5. RIT MEMS BULK PROCESS 1 P+ Diffused Layer (90 Ohm/sq) 1 Poly layer (40 Ohm/sq) 1 metal layer (Al 1µm thick) 30-40 µm Si diaphragm Top hole

  6. DESIGN GUIDELINES Microelectromechanical Systems The basic unit of distance in a scalable set of design rules is called Lambda, l For the current MEMS process l is ten microns (10 µm) The process has eight mask layers, they are: P++ Diffusion (Green)(layer 1) Poly Resistor (Red)(layer 2) Contact (Gray)(layer 3) Metal (Blue)(layer 4) Diaphragm (Purple) (layer 5) /tools/ritpub/process/mems_bulk_072

  7. DESIGN CONSIDERATIONS • Building blocks of a microfluidic system (lab on a chip) [24] Pinget, M. et al, “Multicentre trial of a programmable implantable insulin pump in type 1 diabetes”, Int. J. of Anaesthesian, vol. 6, pp. 843-846, 1994.

  8. POSSIBLE DEVICES Thermally actuated bimetallic micro-pump Thermally actuated bimetallic micro-pump with resistors for sensing and feedback Pressure Sensor, diffused resistors or poly resistors Thermocouples (Thermopile) on diaphragm with built-in heater Optical Pyrometer Heater on diaphragm either poly or diffused resistor heater Heater plus temperature sensor (diffused heater, poly resistor sensor) Heater plus interdigitated chemical sensor Humidity sensor Gas flow sensor single resistor anemometer Gas flow sensor with heater and two resistors Transistors and logic

  9. POSSIBLE DEVICES Pressure sensor Flow sensor Thermocouples Micro-pump

  10. DESIGN AREA • Design for a 2mm wide by 25 or 100µm tall channel. • Probe pads and connections must be as large as possible and away from channel, pads on one side is good, bigger is better. • Design space is 4mmx4mm. 4mm 4mm

  11. PREVIOUS CLASS DESIGN

  12. MASK ORDER FORM Individual Student Designs are sent to a dropbox to be combined with other designs. Click: File/Cell/Save/as: /dropbox/MEMS_07_08/your_name_design Example: /dropbox/MEMS_07_08/lynn_fuller_mirror

  13. PREVIOUS LAB SECTION 1X ARRAY

  14. PREVIOUS MASKS

  15. ETCHED BULK MEMS PROCESS FLOW 3-15-07

  16. PRESSURE SENSOR EXAMPLE Front Back

  17. FINITE ELEMENT ANALYSIS Points of Maximum Stress

  18. R3 R1 R4 R2 CALCULATION OF EXPECTED OUTPUT VOLTAGE +5 Volts Vo2 The equation for stress at the center edge of a square diaphragm (S.K. Clark and K.Wise, 1979) Stress = 0.3 P(L/H)2 where P is pressure, L is length of diaphragm edge, H is diaphragm thickness For a 3000µm opening on the back of the wafer the diaphragm edge length L is 3000 – 2 (500/Tan 54°) = 2273 µm Gnd Vo1 Layout

  19. CALCULATION OF EXPECTED OUTPUT VOLTAGE (Cont.) Stress = 0.3 P (L/H)2 If we apply vacuum to the back of the wafer that is equivalent to and applied pressure of 14.7 psi or 103 KN/m2 P = 103 N/m2 L= 2273 µm H= 25 µm Stress = 2.49E8 N/m2 Hooke’s Law: Stress = E Strain where E is Young’s Modulus s = E e Young’s Modulus ofr silicon is 1.9E11 N/m2 Thus the strain = 1.31E-3 or .131%

  20. CALCULATION OF EXPECTED OUTPUT VOLTAGE (Cont.) The sheet resistance (Rhos) from 4 point probe is 61 ohms/sq The resistance is R = Rhos L/W For a resistor R3 of L=350 µm and W=50 µm we find: R3 = 61 (350/50) = 427.0 ohms R3 and R2 decrease as W increases due to the strain assume L is does not change, W’ becomes 50+50x0.131% W’ = 50.0655 µm R3’ = Rhos L/W’ = 61 (350/50.0655) = 426.4 ohms R1 and R4 increase as L increases due to the strain assume W does not change, L’ becomes 350 + 350x0.131% R1’ = Rhos L’/W = 61 (350.459/50) = 427.6 ohms

  21. CALCULATION OF EXPECTED OUTPUT VOLTAGE (Cont.) 5 Volts 5 Volts No stress Vo2-Vo1 = 0 R3=427 R1=427 R3=426.4 R1=427.6 Vo1=2.5v Vo2=2.5v Vo2=2.5035v Vo1=2.4965v R2=427 R4=427 R2=426.4 R4=427.6 With stress Vo2-Vo1 = 0.007v =7 mV Gnd Gnd

  22. OUTPUT VOLTAGE VERSUS PRESSURE 12 8 Vout (mV) 4 0 0 5 10 15 5-13-02 Pressure (psi)

  23. REFERENCES • Process Development for 3 D Silicon Microstructures, with Application to Mechanical Sensor Devices, Eric Peeters, Katholieke Universiteit Leuven, March 1994.] • United States Patent 5,357,803 • S.K. Clark and K.D. Wise, “Pressure Sensitivity in Anisotropically Etched Thin-Diaphragm Pressure Sensors”, IEEE Transactions on Electron Devices, Vol. ED-26, pp 1887-1896, 1979.

  24. FINAL LAB REPORT AND NOTEBOOK • Complete your lab notebook, sign each page, date each page, diary format, comments and observations, etc. • Write a ~4 page technical paper on this laboratory project. Use the standard IEEE conference proceedings format. See attached format and example paper. Both Due 1st day of Finals Week