1 / 9

AMD Opteron Architecture and Multiprocessor Capabilities

Explore the main features of the AMD Opteron processor and its advanced architecture, including caching mechanisms and HyperTransport technology for efficient multiprocessor systems.

astro
Download Presentation

AMD Opteron Architecture and Multiprocessor Capabilities

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Multiprocessors II Andreas Klappenecker CPSC321 Computer Architecture

  2. The AMD Opteron (Topic suggested by Paul Krizak)

  3. Main features • 64 bit processor • backwards compatible • HyperTransport • Double Data Rate (DDR) memory controller

  4. The Opteron Architecture

  5. Caches • 64 Kbytes L1 data cache • two-way set associative • 64 Kbytes L1 instruction cache • two-way set associative • L2 cache for both instruction and data • 16-way set associative • data cache protected by ECC • if a cache line contains an instruction, then ECC bits store predecode and branch prediction information

  6. HyperTransport • Each processor has three data links • two for communication between processors • one for I/O • Data rate is 3.2 Gbytes/s each direction Consequence: SMP capability

  7. HyperTransport

  8. Two Processor Server

  9. Four Processor Server

More Related