Reconfigurable DSP Project

1. Reconfigurable DSP Project The ChooChoo: Final Design Review Group 2-Algorithm School of Electrical and Computer Engineering Georgia Institute of Technology MPEG II Decoder FDR--ECE6276 Class Project 12/06/00

2. Team Members • Yan Chen • Mahmut Ciftci • Majdi El Tajoury • Preston Faiks FDR--ECE6276 Class Project 12/06/00

3. x0 y0 x4 y1 - x2 y3 1 x6 - y2 - - x1 y7 1 - x5 y6 1 2 - - x3 y4 - - x7 y5 - - - - 11 multiplication and 29 adds/subtractions InverseDCT FDR--ECE6276 Class Project 12/06/00

4. InverseQuantisation Reconstruction F"[0][0] = intra_dc_mult x QF[0][0] (intra DC) F"[v][u] = ((2xQF[v][u]+k)xW[v][u]xquantizer_scale/32 Saturation Mismatch Control FDR--ECE6276 Class Project 12/06/00

5. f_code motion_code delta scaler PMV range motion_residual vector MotionCompensation Motion Vector Decoding Forming Prediction Adding Prediction and Coefficient Data FDR--ECE6276 Class Project 12/06/00

6. C3 * * * + - + X1i X1o C2 X2i X2o C4 Small Test Code for Profile 1 Butterfly Basic calculation procedure: Load X1i and X2i from memory to register Xtemp1 and Xtemp2 Xtemp1 add Xtemp2 store in register A Load c2 from memory to register Xtemp3 A multiple Xtemp3 store back in register A Load c3 from memory to register Xtemp3/4*3 (Xtemp1 multiple Xtemp3) add A store back to memory X1o Load c4 from memory to register Xtemp3 (Xtemp1 multiple Xtemp3) subtract A store back to memory X2o Note: • c1,c2,c3 and c4 are constants stored in the memory and • c3=c1-c2 & c4=c1+c2. • 2. X1i,X2i are the butterfly input signal stored in the memory • and X1o, X2o are the butterfly output signal that will be stored • back to memory after the calculation. • 3.if use Xtemp4 you can load c3 while you do the multiplication. FDR--ECE6276 Class Project 12/06/00

7. d[y][x] f[y][x] p[y][x] f_s d_s p_s 45 50 95 200 255 90 0 0 -5 d_s+4 f_s+4 p_s+4 90 180 90 Small Test Code for Profile 3 Load f_s to register APf; Load p_s to register APp; Load d_s to register APd; Load 255 to register X; Load 4 to register N; 1 Load the value pointed by APf from memory to register A; Load the value pointed by APp from memory to register B; A add B and store the result back to A; Tell the sign of A; If negative A: store 0 to memory pointed by APd; X subtract A and store the result to register B; Tell the sign of B; If negative B: store 255 to memory pointed by APd; Else: store A to memory pointed by APd; Increment pointer APf by 1; Increment pointer APp by 1; Increment pointer APd by 1; Decrement N by 1; Compare N with 0; If not equal: branch to 1; End; Motion Compensation FDR--ECE6276 Class Project 12/06/00

8. Achievements • Explaining the MPEG2 decoder algorithm to the other groups . • Providing the information sources. • Selection of efficient implementations. • Pseudo code for each function module. • Assembly pseudo code for each profile • Test C Codes for all the profiles. • Website • Documentation FDR--ECE6276 Class Project 12/06/00

9. Design Improvements • MPEG2 algorithm is standard. • Each function implementation can be improved. • Architecture, instruction set can be improvement by considering whole algorithm such as parts involving header. FDR--ECE6276 Class Project 12/06/00

10. LessonsLearned • MPEG2 algorithm is learned • Communication and planning is the key. • Steps involved in a DSP implementations are learned unfortunately. • Tasks assignments and schedules should be done in details well before the deadline. • It is difficult to work with people with different schedules and backgrounds. • Internet is good source of information FDR--ECE6276 Class Project 12/06/00