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PlayStation2 as a General Purpose Computer

PlayStation2 as a General Purpose Computer. (The Emotion Engine vs. general PC architectures). Can the PlayStation2 compete with the PC as a general purpose computer? . What’s the difference between the general PC architecture and the PlayStation2 architecture?

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PlayStation2 as a General Purpose Computer

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  1. PlayStation2 as a General Purpose Computer (The Emotion Engine vs. general PC architectures)

  2. Can the PlayStation2 compete with the PC as a general purpose computer? • What’s the difference between the general PC architecture and the PlayStation2 architecture? • How do these differences affect the performance of the PlayStation2 on general applications like word processing and running email clients?

  3. SISD vs. SIMD • SISD – Single Instruction stream Single Data stream • Intel and AMD Processors • SIMD – Single Instruction stream Multiple Data streams • PlayStation2 • Motorola's MPC7400 (the G4) • Sun's MAJC

  4. SISD • Takes advantage of instruction-level parallelism • Executes multiple instructions at once on the same data stream • Good performance depends on good cache performance • Very high clock speed (execute as many instructions as you can as fast as possible)

  5. SIMD • Takes advantage of data parallelism • Executes the same instruction on large amounts of uniform data all at once • Good performance depends on efficiently packing data into uniform format • Slower clock speed • Very high throughput

  6. SISD/SIMD

  7. SIMD on the PlayStation2 • The heart of the PlayStation2 is the Emotion Engine • Its main function is to calculate display lists and send them on to a Graphics Synthesizer which renders these lists into three dimensional objects

  8. SIMD on the PlayStation2 • Calculating display lists basically involves vector calculations • the kind of task a SIMD architecture is perfect for • It requires a relatively small set of instructions operating on massive amounts of uniform data • The most common operation is a tight loop iterating through sets of matrices

  9. Differences in cache implementation • SISD data caches tend to be large • Huge performance gains are achieved by reading in a big chunk of data and executing as many instructions as you can on it • This approach is terrible for SIMD architecture • Data is not referenced repeatedly • Vector calculations are performed and then the next bit of data is read • Nothing is gained by storing old data in cache memory

  10. Cache specs for the Pentium 4 (SISD architecture) • 12K µop 8-way set associative execution trace cache • 8K 8-way set associative data cache • 256K or 512K 8-way set associative Level 2 cache • The exact size of the L1 instruction cache is not clearly documented (8-12K would be a reasonable assumption)

  11. Cache specs for Emotion Engine(SIMD architecture) • 16K 2-way set associative instruction cache • 8K 2-way set associative data cache • Two Vector Units (VU0 and VU1) each have a 16K instruction cache and 16K data cache • 16K SPRAM (Scratch Pad RAM - high speed memory shared by the processor and VU0

  12. Cache Specs • The PlayStation total cache size is smaller than the Pentium 4 by a factor of about 3 or 5 depending on the size of the Pentium L2 cache • Also, the caches are divided up into much smaller units on the Emotion Engine • The big difference is the lack of a L2 cache in the Emotion Engine

  13. Bandwith in the Emotion Engine • Designed with massive bandwith to maximize throughput • Memory bus bandwith: 3.2 GB/s • 16-bit bus connects two 128 MB RDRAM memory banks to the 10-channel Direct Memory Access Controller (DMAC) • DMAC allows up to 10 simultaneous data transfers on 128-bit and 64-bit buses • Much higher throughput is achieved because the system can service more requests simultaneously

  14. General Purpose SISD Architecture

  15. Emotion Engine Architecture

  16. Performance of the PlayStation2 • In multi media applications • Outperforms PC’s by far on tasks such as • mp3 encoding/decoding • mpeg encoding/decoding • graphics applications • In applications that have very little data parallelism (like word processing, email, or internet browsing) • Degenerates to a machine with very low clock rate and a terrible cache implementation • Cannot possibly compete with modern PC’s

  17. Can the PlayStation2 compete with general purpose CPU’s? • Not currently • The lack of a L2 cache makes it difficult to compete with SISD architectures on workloads with high data reuse • Even if we focus entirely on multimedia applications • Code would have to be re-written and re-compiled to take advantage of the Emotion Engine’s higher bandwith and vector processors • Not enough memory • Only supports a total of 32MB • Not enough permanent storage • Max storage capacity is 16MB (two 8MB memory cards)

  18. Some Necessary Improvements • Several improvements are necessary if the PlayStation2 wants to compete with general purpose PC’s in the future. For example: • Memory hierarchy needs to be re-designed to accommodate SISD workloads • A level 2 cache and a trace execution cache would substantially improve performance • A more powerful core CPU is necessary • Wider issue • Improved branch predictor • Programmers need to learn how to fully utilize the strengths of the Emotion Engine Architecture

  19. In the Future • The PlayStation2 will face tougher competition from PC architectures, like the G4, that are incorporating SIMD architectures into their design more aggressively • It will be interesting to see how these new architectures compete with the PlayStation2 as 3D gaming systems

  20. References • Jon “Hannibal” Stokes: • “Sound and Vision: A Technical Overview of the Emotion Engine” • http://www.arstechnica.com/reviews/1q00/playstation2/ee-1.html • “The PlayStation2 vs. the PC: a System-level Comparison of Two 3D Platforms” • http://www.arstechnica.com/cpu/2q00/ps2/ps2vspc-1.html • “3 1/2 SIMD Architectures “ • http://www.arstechnica.com/cpu/1q00/simd/simd-1.html • A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoderSuzuoki, M.; Kutaragi, K.; et alSolid-State Circuits, IEEE Journal of , Volume: 34 Issue: 11 , Nov. 1999 Page(s): 1608 -1618 • Vector unit architecture for emotion synthesisKunimatsu, A.; Ide, N.; Sato, T.; Endo, Y.; Murakami, H.; Kamei, T.; Hirano, M.; Ishihara, F.; Tago, H.; Oka, M.; Ohba, A.; Yutaka, T.; Okada, T.; Suzuoki, M.IEEE Micro , Volume: 20 Issue: 2 , March-April 2000 Page(s): 40 -47 • Designing and programming the emotion engineOka, M.; Suzuoki, M.IEEE Micro , Volume: 19 Issue: 6 , Nov.-Dec. 1999 Page(s): 20 -28

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