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Schematic setup 21 Na ACQ. ADC E-Ge1 E-Ge2 E-Ge3 E-Ge4 E-Si-dE E-Si-stop E-Si-intm E-Ge-slit. Short range TDC (400 ns ?) T-Ge1 T-Ge2 T-Ge3 T-Ge4 T-Si-dE T-Si-stop T-Si-intm. Long range on beam off time(500 s ?) T Ge trigger T Si trigger T-Ge-slit (pro memory). Status

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schematic setup 21 na acq
Schematic setup 21Na ACQ

ADC

E-Ge1

E-Ge2

E-Ge3

E-Ge4

E-Si-dE

E-Si-stop

E-Si-intm

E-Ge-slit

Short range TDC (400 ns ?)

T-Ge1

T-Ge2

T-Ge3

T-Ge4

T-Si-dE

T-Si-stop

T-Si-intm

Long range on beam off

time(500 s ?)

T Ge trigger

T Si trigger

T-Ge-slit (pro memory)

Status

beam-on/off

ACQ busy

Scalers: rates and dead time measurement

slide2

TFA

CFD

scaler

ADC

BGO

Ge1

:

Ge4

MA

stretcher

4x

PA

MA

Ge1

Ge2

Ge3

TFA

CFD

or

Ge4

Shield

Ge trigger

and

scalers

Analogue signals Ge

slide3

RF

td 40ns

CFD

TAC

stop

start

out

Si-int

plane

PA

TFA

CFD

td 20ns

ADC1

ch1

ch2

ch3

ch4

ch5

T-int

MA

Si-dE Si1

Focal pl

PA

Caen

amp/sha

ch0

ch2

ch4

Si-dE Si2

Focal pl

PA

Si-stop Si3

Focal pl

PA

lin fifo

octal

disc

N147

Caen

T-Si1

T-Si2

T-Si3

Analogue signals Si

TFA

slide4

scaler

common start TDC appears not used

common start TDC not used see TAC

slow gate ADC Ge

slow gate ADC Si

dead time measurement

dual timer

start

noto out

VME scaler 1

MCR

2

dead time

(TM)

coinc win

(FC)

4

fi/fo

T-int

start

noto out

T-Si1

VME scaler 2

T-Si2

fi/fo

T-Si3

or Ge

HCMR

OPA1

out

to cyclo: beam off

trigger logic