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The DMA Controller

The DMA Controller. Definition and Advantages Hardware Modes Port A Special Function. What is DMA?. Direct Memory Access Assists the movement of data between external memory and internal peripherals with minimal CPU intervention

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The DMA Controller

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  1. The DMA Controller Definition and Advantages Hardware Modes Port A Special Function

  2. What is DMA? • Direct Memory Access • Assists the movement of data between external memory and internal peripherals with minimal CPU intervention • An internal peripheral is assigned to one or more DMA channels. • Each channel moves data one direction. • It either receives incoming data or transmits outgoing data.

  3. Advantages of DMA • Fast memory transfer of data • CPU and DMA run concurrently under cache mode • DMA can trigger an interrupt, which frees the CPU from polling the channel

  4. DMA Hardware NET+ARM Peripheral DMA Receive Channel Transmit Channel RAM

  5. Direct Memory Access (DMA) Summary • 10 Channels total • 8 channels wired into NET+ARM modules • Ethernet, Serial, Parallel / ENI • 2 Channels available for external Memory moves • Handshaking signals muxed into GPIO lines • Can move data while ARM executes from Cache • Simple Implementation • Good for repetitive data movement

  6. Modes of Operation • Fly-by • Data is directly transferred between memory and the peripheral • Memory to Memory • Data is not directly transferred, but buffered in between transfers • Data is copied from the source location into a temporary area in the DMA channel, and then written into the destination location.

  7. External DMA – Fly By Net+ARM DMA Request Peripheral DMA Controller DMA Grant Add Memory DATA

  8. Closer look at Fly-By Signaling Net+ARM DRQ* DACK* DONE* R / W* DATA[31:0] ADDR[27:0] CSx* External Device DRQ* Enable Done Direction DATA[31:0] Memory CS* ADDR[X:0] DATA[31:0] R / W*

  9. External DMA – Mem To Mem DMA Request Net+ARM Peripheral DMA Controller DMA Grant ADD Holding FIFO DATA ADD DATA Memory

  10. Closer Look at Mem to Mem Signaling Net+ARM DRQ* DACK* DONE* R / W* DATA[31:0] ADDR[27:0] CSx* Csy* External Device DRQ* Enable Done Direction DATA[31:0] ADDR[X:0] CS* Memory CS* ADDR[X:0] DATA[31:0] R / W*

  11. Port A Special Function - DMA Port A Configuration Pin MODE DIR A6 1 0 A2 1 1 A0 1 1 PORTA7 / TXDA PORTA6 / DTRA* / DRQ1* PORTA5 / RTSA* PORTA4 / OUT1A* / RXCA PORTA3 / RXDA PORTA2 / DSRA* / DACK1* PORTA1 / CTSA* PORTA0 / DCDA* / DONE1* DRQ1* 1st Xfer 2nd Xfer Last Xfer DACK1* DONE1* Rough Timing Diagram

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