DMA CONTROLLER WHOLE WORKING. 8237 DMA Controller. 8237 DMA Controller Summary. D irect M emory A ccess means that the microprocessor is not involved in the transfer of data
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ADDRESS [CS + ?] REGISTER R / W
0 CH 0 ADDRESS R / W
1 CH 0 COUNT R / W
2 - 7 AS ABOVE FOR CH 1 - CH 3
8 COMMAND W
8 STATUS R
9 REQUEST W
A MASK (SINGLE) W
B MODE W
C BYTE POINTER W
D TEMPORARY R
D MASTER CLEAR W
E CLEAR MASKS W
F MASK (ALL) W
An 8237 is decoded in I//O space so that -CS is selected if the address is 350H. What are the addresses of the mode ,command , channel 2 address, channel 2 count, and page registers?
From the chart of 8237 user accessible registers, we see that:
A 1K block of data starting at location D4200 must be transferred to an I//O using channel 2. Write the program to initialize (set-up) the address and count registers
There are essentially two steps in a DMA transfer. In the first step one sets up the 8237. This step usually consists of setting up many registers. In the second step one requests DMA action ..... preferably by pulling the hardware line (DREQ) or by software (Request register). We will simply show the set-up part for the address and count registers.
What is the command word byte if an area of memory must be filled with a byte of data stored at another memory location?
Look at the command word format as you follow the solution given below:
So the answer is 03
Remember the page register? This is not one of the registers in the 8237. The page register is an address outside of the 8237 and it holds the part of the physical address beyond A15