FAZIA DAQ development

1. FAZIA DAQ development Alfonso Boiano - Antonio Ordine

2. FAZIA DAQ Preliminary schematic of complete final system (November 2008)

3. FAZIA DAQ Preliminary schematic of phase 2 system (about 300 telescopes)

4. FAZIA slow control: 1° hypothesis We could “reuse” some components of the FAIR (Fast Intercrate Readout) System. FAIR was a hardware/software development: • dedicated backplane (inside a crate) and inter-crate links with a low level protocol for readout and event building (180 MB/s sustained and up to 226 channels) • a dedicated serial network, FNET (FAIR Network), for slow control and setup • a software package for system management FAIR System was used, since 1998, to implement the data acquisition system of several experimental apparata: 8πLP, Garfield, SerpeandNUCL-EX at LNL, LUNA at LNGS, ERNA at EPIII in Bochum, ISOSPIN at Tandem Laboratory of Physics Department in Napoli, CIRCE Tandem Laboratory at the “Seconda Università di Napoli”

5. The FAIR System Management (slow control – setup) The components of the FAIR package are shown in the figure: • FAIR System Manager • the main program: the set of procedures to perform the control of the system – it is the server of the Graphical system interface • FAIR Network interface • The set of routines to communicate via the FNET serial network with front end modules • FMDL (FAIR Module Description Language) metadriver • The metadrivercapables of managing all type of FAIR front end module (ADC, TDC, Scaler, Delay, etc.) • Front end modules database • It is the database of all the front end modules present in the system. It is created by an automatic procedure named “auto-recognition”, performed by the FAIR System Managerat the initialization of the system • Graphical system interface • The graphical human interface to the system. It is the client of FAIR Sistem Manager All the components 1 to 3 are written in C standard POSIX (Portable Operating System Interface IEEE 1003 – ISO/IEC 9945) The Graphical system interface is written in C standard but also uses Motif X-Window library The package has an “open” very simple and “light”structure (the sources size of 1 through 4 components is few hundreds Kbytes)

6. FNET features summary • Serial bidirectional network • Simple single master – multi slave structure • 4 command classes: • Single slave addressing by node ID • Single slave geographical addressing • Broadcast • Multicast (up to 128 groups) The FNET was implemented by using a 8051 family microcontroller. The results was a slow (only 16KB/s transfer rate) but very robust media. The robustness is achieved by means of 2 simple rules: • Every transaction is strictly driven by the Master, word by word (full asynchronous) • When the Master sends a new command to one or more slaves, the slaves clear any pending operation before to perform the new command (interrupt → clear stack).

7. FNET commands A few examples: 1° Type Commands Syntax: COMMAND <node-ID /Multicast-Group / Broadcast> Examples: RESET, CLEAR: reset/clear one or more modules ONLINE, OFFLINE: put one or more modules online/offline acq. 2° Type Commands Syntax: COMMAND <node-ID> <reg-addr> READ: read the module internal register at address “reg-addr” READ_AI: reads one or more consecutive registers starting at “reg-addr” (address auto-increment mode) READ_MD: special auto-increment read for the FMDL description contained into the module 3° Type Commands Syntax: COMMAND < node-ID /Multicast-Group / Broadcast > <reg-addr> WRITE, WRITE_AI: like read commands but with the availability of multicast/broadcast addressing Note: if we will use FNET, only a limited sub-set of the commands shown in the table will be implemented.

8. The FAIR Module Description Language - FMDL The FMDL is a language for the description of peripherals (front end modules) By means of FMDL the manufacturer of a peripheral describes general information about it along with its registers and associated functions The description (ASCII file) is put in a ROM into the peripheral The description of all the modules in a system can be retrieved by the FAIR System Manager that automatically find out the composition of the current front end and can learn how to setup it The information about the front end is organized in a data base which can be accessed and modified by the user by means of the Graphical system interface In this way there is only one driver, the FMDL metadriver, to manage at same time any type of FAIR front end module in the system No software drivers need to be written “ad-hoc” and added to the system when a new module is added to the front end

9. The FMDL: a very simple example In FMDL we can describe a peripheral by describing all its internal registers, we report just only one simple definition as example: Delay addr=$300; range=0, 255; equivr=ns, 25, 6400; default = 1; note= To set the delay of a specified output signal with respect the corresponding input signal.;@ • The register we are describing was named “Delay” by the manufacturer. It set the delay to output a digital signal applied to an input. • addr, range, equivr, default and note are FMDL keys to describe the register. • The register Delay • has the internal address 300 (addr=$300) • its size is 8 bit (range=0,255) • the correspondence between digital value and delay time, in ns, is linear (equivr=ns,25,6400) and is 25 ns for the value 0, and 6400 for value 255 (each step is 25 ns) • the manufacturer suggests to set, at first automatic initialization, 25 ns (default=1) • the key note is a comment that can be displayed, as help for the user, on the Graphical system interface

10. The Graphical Interface for module setup The front end manager Modules present in a crate Module editor to edit the setup of a module