Hardware Design of an Arithmetic Logic Unit (ALU). Felix Noble Mirayma V. Rodriguez Agnes Velez. University of Puerto Rico Mayagüez Campus Mayagüez, Puerto Rico Department of Electrical and Computer Engineering. Outline. Introduction ALU Design Full Adder A input device B input device
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Mirayma V. Rodriguez
University of Puerto Rico
Mayagüez, Puerto Rico
Department of Electrical and Computer Engineering
Full 8-bit adder
The Arithmetic Logic Unit was implemented by doing a hardware design of the unit. The way the design was made is very easy to understand since it was made by doing block diagrams of the different parts of the device. This abstraction made us understand better each part of the unit and realize how important these parts are for the correct operation of the ALU. The bus that was utilized made it easier to understand the circuit even dough in the practical area this design will be much slower than designs using two or three buses. In conclusion this ALU device will work with the SRC architecture because it implements every instruction of the SRC.
There could be more projects based in the implementation of the Arithmetic Logic Unit. First the ALU can be improved in many ways by changing parts of the design or adding busses to the circuit. This can lead to create the entire Control Processing Unit of the SRC. Having done the CPU the entire processor can be done too.
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