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ITRS Presentation PIDS ITWG Emerging Research Devices July 18, 2001 Jim Hutchby - SRC Marriott - San Francisco PIDS ITWG Novel Devices Working Group Participants George Bourinaoff Intel/SRC Joop Bruines Philips Joe Brewer U. Florida Jim Chung Compaq Peng Fang AMAT

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pids itwg novel devices working group participants
PIDS ITWG Novel Devices Working GroupParticipants
  • George Bourinaoff Intel/SRC
  • Joop Bruines Philips
  • Joe Brewer U. Florida
  • Jim Chung Compaq
  • Peng Fang AMAT
  • Steve Hillenius Agere
  • Toshiro Hiramoto Tokyo U.
  • Jim Hutchby SRC
  • Dae Gwan Kang Hynix
  • Mike Forshaw (UC London)
  • Makoto Yoshimi Toshiba
  • Kentaro Shibahara Hiroshima U.
  • Kristin De Meyer IMEC
  • Tak Ning IBM
  • Byong Gook Park Seoul N. U.
  • Luan Tran Micron
  • Bin Zhao Conexant
  • Victor Zhirnov SRC/NCSU
  • Ramon Compano Europe Com
  • Simon Deleonibus (LETI)
  • Thomas Skotnickl (ST Me)
emerging research devices introduction and scope
Cast a broad net to introduce readers to device and architecture concepts for information processing ---

Identify ---

--- not endorse

Include ---

--- not validate

Illustrative ---

--- not comprehensive (yet)

Stimulate ---

--- not eliminate

Concepts ---

--- not hardened solutions

Emerging Research DevicesIntroduction and Scope
emerging research devices requirements motivations for beyond cmos
Fundamental Requirements (partial list)

Energy restorative functional process (e.g. gain)

Extend microelectronics beyond the domain of CMOS

Compelling Motivations (or-ed)

Functionally scaleable > 100x beyond CMOS limit

or High information processing rate and throughput

or Minimum energy per functional operation

or Minimum, scaleable cost per function or

or Interfaceable with CMOS.

Emerging Research DevicesRequirements & Motivations for Beyond CMOS
emerging technology sequence

Tech

Vectors

Emerging Technology Sequence

Quantum computing

Defect Tolerant

CNN

Architecture

molecular

QCA

3D Integration

Logic

RSFQ

QCA

Molecular

SET

RTD-FET

Magnetic RAM

Phase Change

Nano FG

SET Mem

Molecular

Memory

FD SOI

Strained Si

Non-classical

CMOS

Vertical TR

FinFET

Planar dbl gate

Time

emerging research devices row metrics
Application and drivers

Maturity (development, demonstrated, concept)

Advantages

Issues

Design challenges

Timing

Emerging Research DevicesRow Metrics
slide9

Emerging Research Logic Devices1PIDS ITWG Emerging Research Devices Working Group

1The time horizon for entries increases from left to right in these tables

slide10

Molecular

Architecture

Defect

architecture

Tolerant

architecture

Quantum Computing

3

-

D Integration

Cellular Nonlinear

Quantum Cellular

networks

Automata

CMOS with

Quantum Dots

Many self

Molecular

Single electron array

Spin resonance transistors,

Device

dissimilar material

assembled

switches and

architectures

NMR devices

Implementation

systems

nanodevices

memories

Single flux quantum devices

Less interconnect

High functional

Supports

Supports

Enables utilization of

Exponential performance

Advantages

delay

density

imperfect

memory

single electron devices

scaling, enables unbreakable

Enables mixed

No interconnects

hardware

based

at room temperature,

cryptography

technology solutions

computing

memory based

computing

Heat removal

Limited fan out

Requires pre

-

Limited

Subject to background

Extreme application

Issues

No design tools

Low temperatures

computing test

functionality

noise, tight tolerances

limitation, extreme

Difficult test and

technology requirement

s

measurement

Demonstration

Demonstration

Demonstration

Concept

Concept

Concept

Maturity

Emerging Research Architectures PIDS ITWG Emerging Research Devices Working Group

major questions
The Emerging Research Device Section presents candidate approaches for:

Emerging Non Classical CMOS and Memory Devices

New beyond-CMOS information processing devices & architectures

Other device entries?

Additional information needed? Granularity of information?

Intent of 3D charts is to relate the emerging technologies to each other in a comparative fashion:

Emerging technologies are parameterized in terms of density, speed, cost and energy. Other parameters of interest?

Other representations of interest (Analog, RF, Mixed Signal)?

Comments/critique of domain representation for CMOS and/or other entries?

Major Questions