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Introduction To Space Microelectronic Products October 2009

Introduction To Space Microelectronic Products October 2009. Take Home Messages. Honeywell Is An Experienced, Fully Qualified Supplier Of Space Microelectronics, Ready To Work With You To Apply Our Capabilities To Your Programs

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Introduction To Space Microelectronic Products October 2009

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  1. Introduction To Space Microelectronic Products October 2009

  2. Take Home Messages • Honeywell Is An Experienced, Fully Qualified Supplier Of Space • Microelectronics, Ready To Work With You To Apply Our Capabilities • To Your Programs • Digital And Mixed Signal ASICs, SRAMs, NVRAM, SERDES And • Multi-Chip Modules • Obsolete IC Replacements, Including FPGA To ASIC Conversions • Proprietary Technology Built In Our Own Trusted Foundry • - QML Certified Quality Systems In Place • - Semiconductor Industry Experienced Management Team • Let’s Use This Meeting To Answer Your Questions And Deepen Your • Understanding Of Our New Product Offerings Experienced, Qualified And Ready

  3. M&PS Product Lines Microelectronics & Precision Sensors Rad Hard IC’s Pressure Sensors Magnetic Sensors IC Emulations Commercial IC’s “Replacement Of Obsolete IC’s For Life Extension Of Critical Systems” “Miniature High Precision Integrated Magnetic Sensor” “RF Components And Mixed Signal Custom ICs” “Best in Class Radiation Performance” “Most Precise Pressure Sensors In The Industry” Our Trusted Foundry Supports Multiple Product Lines For Balanced Growth

  4. Leading Source For Space Microelectronics • Mature Production • 6 Inch 0.8/0.35um, 40,000 SF Clean Room • 0.8 Micron Production Since 1995 • 0.35 Micron Production Since 2001 • Capable Of Classified Design, Fabrication And Assembly • Committed To Maintain Thru 2015 • Expanded 150 nm Production • $100M Of Building & Equipment • 8 Inch 150nm, 10,000 SF Clean Room • Digital & Mixed Signal Process Flows • QML Qualified Processes • Committed To Maintain Thru 2015 Qualified And Ready For More Demand

  5. Trusted Foundry Accreditation Leading Strategic Rad Hard IC Trusted Foundry!

  6. Approaches To Achieving Hardness • Radiation Hardness Achieved By SOI CMOS Process And Numerous Other Techniques • Rad Hard By Process (RHBP) • SRAMs Built On SOI CMOS With Inherent Radiation Hardness Compared To Bulk CMOS (Total Dose To 1M Rad) • Hardened Dielectrics • Optimized Transistor Structures • Can Also Implement Rad Hard By Design (RHBD) Techniques When Beneficial • Radiation Hardness Addressed At All Levels • Architectural: Floorplanning, Improve dynamic SEU performance • Unique Devices: Active Delay Elements • Memory Cell Design: Transistor Quantity, Hardening Elements • Layout: Alignment Of Critical Cells And Nodes, Power Bussing, Customized Design Rules • Logic And Other Circuits: Hardened Logic Cells, Specialized Timing Techniques • System Level EDAC – Done External If Required • No EDAC Or Refresh Required For SRAM SEU Performance Hardened By Process Is Most Efficient Approach

  7. Honeywell Products

  8. SOI CMOS Wafer Processes Transistor Cross Sections Bulk CMOS High Capacitance Region Substantially Reduced By Buried Oxide Layer SiO2 SOI CMOS Silicon Substrate • Buried SiO2 Layer Provides • Radiation Hardness • Ultra High Reliability • 30% To 40% Faster Circuits At Same Node • 30% To 40% Lower Power At Same Node • Excellent Isolation For Mixed Signal ASICs • Continuous High Temp Operation At 225°C * Assured Source Of Supply To Major Space Programs QML Qualified Source For Space Microelectronics

  9. Rad Hard Digital ASIC Family * (nW/gate/MHz) ** maximum number depends on mix of logic and memory 15 Digital ASIC Product Platforms

  10. 4M SRAM 16M SRAM (x8) HX5000 16M SRAM (x32) HX5000 & S150 QML Qualification Completed • S150H and Technology QML Qualification Received – 4/22/08 • 16Mb SRAM and 4Mb SRAM QML Qualification Received – 4/22/08 & 7/08 • HX5000 QML Qualification Received – 11/18/08 • QML Qualification For The HX5000 ASIC Family Qualifies The Baseline Design Flow, Libraries, And All Manufacturing And Test Processes. • Qualification Vehicle Size: 3.9M gates • New HX5000 Designs • Qualification does not put a limit on gate count. DSCC and Honeywell have agreed for each ASIC larger than previously qualified, the following will be performed: • Ensure design and software tools are the same as used on the qual vehicle or are requalified • Ensure all timing closes • Complete standard QML V QCI life test on device that encompasses the complexity of the larger ASIC (the new ASIC)

  11. HX5000 / S150 Successes • PDV 1.6M gates • Customer test chip 4.1M gates • QTV 3.9M gates • 4M SRAM Memory • 16M SRAM Memory • 1M MRAM NV Memory • Trivor (RT) SERDES • Trivor (RH) SERDES • Customer ASIC 1 6.9M gates • Customer ASIC 2 4.0M gates • Customer ASIC 3 12.4M gates A record of successful 150nm designs – lowest risk for your programs

  12. ASIC Trends • 700 ASICs Designs Delivered to Space Customers Without a Mission Failure

  13. Space Programs Require Long Production Technology Cycles • RICMOS IV was 12 years • SOI IV is 14 years and counting • SOI V is 9 years and counting Honeywell Will Support Your Long Life Program Needs

  14. QML Qualified HX5000 ASIC Design Flow Typical Responsibilities Customer Customer-Honeywell Honeywell System Specification Development Verification Phase 1 Trial Place and Route Chip Specification Development RTL Design RTL Refinement and Optimization Honeywell Design Flow Synthesis Design Flow Entry DFT Floorplan PhysicalSynthesis Place and Route Package Requirements ASIC Fabrication Package Development Assembly Test Requirements Test Test Development Screening Proven On Numerous Programs And Tapeouts

  15. Rad Hard Mixed Signal ASIC Platforms * maximum number depends on mix of functions 15 Different Platforms Available Today

  16. HMX2000 Mixed-Signal Design IP • Technology • 0.7µm, 3 or 4 Layer Metal, SOI-IV Wafer Process • 5V Operating Voltage • NMOS cutoff frequency (Ft) 15GHz • NMOS Vt Matching 1sigma ~1.0mV • PMOS Vt Matching 1sigma ~1.5mV • Inductors (Metal Spiral) Q~2-5, 2-5nH • Linear Capacitor 100ppm/Volt, 0.5fF/µm2 • DMOS: NMOS and PMOS >20 Volts Breakdown • Lateral Bipolar : ß>20 • CrSi Resistor: 300ppm/°C, 2.5KΩ/sq. Design IP Realized In HMX2000 • Realizable In Gate Array Family • Gate Array Core Gates Usable Gates Max I/O • ----------------- ---------------- ---------------- ----------- • HMX2040 40K 36K 132 • HMX2080 85K 71K 176 • HMX2160 160K 132K 240 • HMX2300 295K 226K 336 • HMX2400 390K 290K 372 • Verified In Silicon Design IP Blocks • 8-Bit Successive Approx. ADC • 12-Bit Pipeline ADC • 12-Bit Current Steering DAC • Analog Cells • Op-amps • Current Bias Generators • Band-gap Voltage Reference • Power-Up Reset • Auto-zero Comparator • Dual Ramp Oscillator • Crystal Controlled Oscillator Proven-In-Silicon Mixed Signal ASIC Design IP

  17. HMX3000 Mixed-Signal Design IP • Technology • 0.35µm, 4 Layer Metal, SOI-V Wafer Process • 3.3V Operating Voltage • NMOS Cutoff Frequency (Ft) 25-45GHz • NMOS Vt Matching 1sigma ~1.0mV • PMOS Vt Matching 1sigma ~1.5mV • Inductors (Metal Spiral) Q~6-12, 2-5nH • Linear Capacitor 100ppm/Volt, 0.5fF/µm2 • DMOS: NMOS And PMOS >20 Volts Breakdown • CrSi Resistor: 300ppm/°C, 2.5KΩ/sq. Design IP Realized In HMX3000 • Verified In Silicon Design IP Blocks • Op Amps • A/D Converters • Voltage References • CMOS, PCI And LVDS I/O • Comparators • Oscillators • Single Port Embedded SRAMs • Dual Port Embedded SRAMs • Realizable In Gate Array Family • Gate Array Core Gates Usable Gates Max I/O • ----------------- ---------------- ---------------- ----------- • HMX303 249K 215K 176 • HMX306 473K 450K 240 • HMX311 880K 770K 336 • HMX314 1.17M 1.0M 388 Proven-In-Silicon Mixed Signal ASIC Design IP

  18. HMX5000 Mixed-Signal ASIC Capability Technology • Vdd (Core Voltage) 1.8V • I/O Voltage 3.3/2.5/1.8V • Gate Dielectrics 30Å & 60Å • Gate Length (drawn) 150 nm • Gate Length (effective) 120 nm • Metal Layers 4, 6, 8 • Gate Delay/Stage 26 ps (RO Inverter FO=1; T-25º) • MIM Cap Option Design IP Realized In HMX5000 • Capability Features • Up To 12M Gates • Core Operating Speed > 500MHz • I/O Speeds 750MHz – 1GHz • Full Military Temp (-55C To 125C) • Supports Rad Hard And Rad Tolerant Apps. • Verified In Silicon Design IP Blocks • Comprehensive Library Of > 600 Standard Cells • Family Of 4/8 Channel SERDES Hard/Soft Macros • Family Of Delay Locked Loops (DLL) • Family Of Phase Lock Loops (PLL) Proven-In-Silicon Mixed Signal ASIC Design IP

  19. Structured Array Product For 2011 • Product Features • 3M Logic Gates • 1.2M Bits SRAM • 824 Signal I/O • 8 PLLS • 1.8V Core Vdd • 1.5, 1.8, 2.5 3.3V • I/O Vdd HX5000 Based Sea Of Transistors Cell • Uses Latest Synopsys Design Software Tools • Replaces Actel AX2000 And Xilinx 2V8000 FPGAs To Provide Flight Qualified ASICs • Available 2010

  20. SERDES Communication I/O • High Signal Integrity • Superior Distance • FR4 backplane > 1m @ 4.25 Gbps • Infiniband cable > 15m @ 4.25 Gbps • Margin Increases At Lower Data Rates • Low jitter • TX DJ = 0.20 UI, TX TJ = 0.33 UI • RX DJ = 0.33 UI, RX TJ = 0.62 UI • BER Of 1e-14 • Individual Channel Programmability • Selectable Data Rate • Selectable Signal Shaping For Optimization Of Individual Channels • Built In Self Test • At Speed Testing Of High-speed Circuitry For Diagnostics And At-Speed Verification On An ATE Platform • RADHARD/Tolerant Design Using Honeywell’s SOI Technology That Can Be Integrated Into An HX5000 ASIC • Supports Multiple Standards • 10GE (4x3.125 Gbps XAUI) • 10G Fibre Channel (4x3.1875 Gbps XAUI) • 1G FC / 2G FC / 4G FC • Low Power • 125 mW Per Channel @ 1.8V • 4–20 Channels With A Single VCO Experienced, Qualified And Ready

  21. 8 Lane SERDES Macro Protocol Logic Transmit Lanes (4) Receive Lanes (4) PLL Transmit Lanes (4) Receive Lanes (4) SERDES Overview – Description From An ASIC Designers Viewpoint • Physical • 1.8V macro includes IO & core logic • 75-pads wide and 2300um deep • Has placement constraints and most likely needs a custom package design • 100-ohm resistor termination is internal, AC-Coupling caps are external. 150-ohm option being developed • The only external parts needed are an external bias resistor and AC-Coupling Caps • Functional • 8 Transmit Lanes and 8 Receive Lanes • Multiple core-side interface points • Protocol logic can be bypassed • Verilog Model includes the analog and digital portions of SERDES8_TOP • Includes loopback and BIST for at-speed test purposes • Performance • Core runs at 1/10th or 1/20th the line rate • All Core-Side handoffs on the VDD domain

  22. Quad Redundant SERDES Standard Product • Protocol Support • 1gbps To 4.25gbps For General Backplane Applications • 1G/2G/4G & 10G (XAUI ) Fibre Channel • 1G And 10G (XAUI) Ethernet • Multiple Bypass Modes • Product Features • Production Units Available Now • Quad SERDES W/Redundant Serial IO • Parallel Interface Using SSTL2 IO • Programmable Input And Output Buffers • 468 LGA Package Ready To Delivering Units Today

  23. SERDES Evaluation Kit • Accepting Orders NOW For • Immediate Delivery! • Enables Evaluating Both The SERDES Macro And The Standard Product • Evaluation Kit Contains • - SERDES Evaluation Board • - Cables And Software • - Documentation • - Video Of Honeywell Demo • Literature And Users Guide Available • Sole Sourced Without Competition From • BAE, Aeroflex Or FPGA Suppliers Let’s Customer Learn How To Use SERDES, Ready For Customer Orders Now

  24. Static RAM Product Update OrganizationPackageProductionSpec Sheet HX6256 32K X 8 28 DIP, FP Now On web site HX6228 128K X 8 32 And 40 FP Now On web site HX6408 512K X 8 36 FP Now On web site HXS6408 512K x 8 36 FP Now On web site HXSR01608 2M X 8 40 FP Now On web site HXSR01608 512K X 32 86 FP Now On web site HXNV0100 64K X 16 64 CQFP Mid 09 On web site All SRAMs Are Radiation Hardened By Process And Optimized For Use In 1M Total Dose, High SEU Dose Environments. Sole Source Products! Leadership Products! QML Qualified With SMD Numbers, Ready For Immediate Design In

  25. HXSR01608 2M X 8 16Mbit SRAM Product • Monolithic Silicon Die Designed For Use In Low Voltage Systems • Measured Radiation Hardness Is > 1MRad (Si) Total Dose < 2X10e-12 Upsets/Bit-day SER > 1X10e14 Neutrons/cm2 Neutron > 1X10e10 Rads (Si)/s Dynamic Transient Upset > 1X10e12 Rads (Si)/s Dose Rate > No Latch Up • QML Qualified Process And Product • Customized Memory Modules Available 40 Pin Flatpack Package SMD Number 5962-08202 Now Shipping QML Qualified Flight Units

  26. HXSR01632 512K X 32 16Mbit SRAM Product • Monolithic Silicon Die Designed For Use In Low Voltage Systems • Measured Radiation Hardness Is > 1MRad (Si) Total Dose < 2X10e-12 Upsets/Bit-day SER > 1X10e14 Neutrons/cm2 Neutron > 1X10e10 Rads (Si)/s Dynamic Transient Upset > 1X10e12 Rads (Si)/s Dose Rate > No Latch Up • QML Qualified Process And Product 86 Pin Flatpack Package SMD Number 5962-08203 Now Shipping QML Qualified Flight Units

  27. 524,288 x 8 Memory Array Row Driver A<0-8> A<9-18> Column Decoder Data Input/Output NWE WE+CS NOE NWE+CS+OE NCS Voltage Regulator NVREN DQ<0-7> VDD HXS6408 4M SRAM Product • Key Selling Points • - Rad Hard By Process! • Low Power! • 512K X 8 Organization! • - < 20nS R/W Cycle Time! • Lower Price Than HX6408! • Exportable With License! • Radiation Performance • - Total Dose 1M Rad (Si) • Latch Up None • Dose Rate Upset 1e10 rad (Si)/sec • Dose Rate Survival 1e12 rad (Si)/sec • SEU 1e-11 Upsets Per Bit-Day • - Neutron Fluence 1e14 N/cm Squared • Functional Diagram Target Customers In USA All In Rad Hard Segment In Europe All In Rad Hard Segment In Japan All In Rad Hard Segment Product Quality & Reliability Made In Trusted Foundry In USA QML Manufacturing Process QML-V And QML-S Screening Flows Life Test Data Available Now Shipping QML Qualified Flight Units

  28. 64M SRAM Memory Module Product • Uses Proven 512K X 32 SRAM Die • Configured As 2M X 32 • 86 Lead Flatpack • 1.23 X 0.96 X 0.19 Inches • (16M X32 SRAM: 1.13 X 0.85 X 0.16 Inches) • Initial MCMs Have Been Built And Tested • - Currently In Burn-in • Production Upgrade Planned For End Of Q1 2010 • Future Plans For x40, 80Mb Module As Well New Leadership Memory Product

  29. HXNV0100 1M Non Volatile MRAM Product • 64K X 16-bit Non-volatile Memory • No Data Loss On Power Down Or Power Interruption • Radiation Hardened For Strategic Applications • No Wear Out - Unlimited Writes • Non-destructive Readout (NDRO) • Magneto-resistance (MRAM) Memory Bits • Magnetically-shielded 64-pin Ceramic Package • Error Correction Code (ECC) • Single EDAC Per Address • Performance • < 70 nS Read Cycle Time • < 100 nS Write Cycle Time • < 500 mW Active Power • < 100 mW Standby Power • 1.8V Core And 3.3v I/O Production April 2010

  30. HMXADC9225 12-bit A/D Converter Product • Radiation Hardened Monolithic 12-bit A/D Converter • 25 MSPS, 4 Stage Pipeline Architecture • On-chip Sample-and-hold Amplifier • Single +5volt Analog Supply • 5V Or 3.3V Digital Tri-state I/O • Requires External 1-2 Volts Vref • 28-lead Space Qualified Ceramic Package • Performance • Rad Hard to >1M Rad(Si) TID • No Latchup • No Missing Codes Guaranteed • Differential Non-Linearity Error: 0.4 LSB • Straight Binary Output Data • Signal-to-Noise and Distortion Ratio: 69.6 db • Spurious-Free Dynamic Range: - 81 db • Typical Low Power: 345mW cjohns42@students.depaul.edu HMXADC9225 Now Shipping, HMXADC9246 14 Bit Version In Development

  31. RS422 Driver 16 lead ceramic package Pin-for-Pin compatible with commercial version RS422 Receiver 16 lead ceramic package Pin-for-Pin compatible with commercial version LVDS Driver Low power, low noise 16 lead ceramic package LVDS Receiver Low power, low noise 16 lead ceramic package Quad Nand Gate High current drive capability 14 lead ceramic package Analog Multiplexer 16 to 1 Mux 16 lead ceramic package Comparator Rail-to-Rail 8 lead ceramic package Dual Operational Amplifier Programmable voltage offset and bandwidth 16 lead ceramic package Digital to Analog Converter 12 bit differential current steering DAC 28 lead ceramic package Transceiver 18 bit transceiver 68 lead ceramic package Radiation Hard Analog and Digital SSI components Honeywell is currently productizing the following SOI CMOS rad hard digital and analog SSI components.

  32. Analog • Op Amps • Discretes • Ring Osc • Power Transistors • Rectifiers • Thyristors • Optoelectronics • Sensors • PLL • Std. Linear • Amplifiers • Application Specific Analog • Processor • 1750a • 8 bit, 16 bit, 32 bit MPU • 4 bit, 8 bit, 16 bit, 32 bit MCU • DSP • FPGA • Actel 1020, 1280 • Actel 54SX32, 54SX72 • Xilinx • Atmel • ASIC • Radio chipset • Encryption • Communications • Audio/video • Mass storage • Computer peripherals • Memory • SRAM • 1Kx4 • 4Kx1 • FIFOs • EEPROM • ROM • PLD • PAL • Interface Electronics • ECL • RS-232 Controller Obsolete Replacement IC “Sweet Spot” Underlined Components Are In Honeywell’s Sweet Spot Today

  33. FPGA Replacement Solutions FPGAMigrates ToAvailableK GatesCycle Time Actel 1020 HX2000 Now 1 12 Weeks Actel 1280 HX2000 Now 1 12 Weeks Actel RTX2000 Structured Array Q409 1000 12-16 Weeks Actel MX Series HX2000 Now 1 Call For Quote Actel eX Series HX2000/3000 Now 12 Call For Quote Actel SX Series HX3000 Now 108 Call For Quote Altera Apex 20k HX3000 Now 500 Call For Quote Altera Flex Series HX2000 Now 250 Call For Quote Altera Stratix HX5000 Now 3000 Call For Quote Atmel AT6002 HXFPGA6010 Now 6 12 Weeks Atmel AT6003 HXFPGA6010 Now 9 12 Weeks Atmel AT6005 HXFPGA6010 Now 15 12 Weeks Atmel AT6010 HXFPGA6010 Now 30 12 Weeks AT40 Series HX2000 Now 50 Call For Quote Xilinx Spartan II HX2000 Now 250 Call For Quote Xilinx Vertex 2 Structured Array Q409 1000 12-16 Weeks Xilinx Vertex 4 HX5000 Now 3000 24-32 Weeks Experienced At Replacing Many FPGA Families With Flight Qualified ASICS

  34. SOI4/4e/5/S150 Life Test Summary

  35. Aerospace – Plymouth Life Test Summary • Reliability – June 2009 Status • By product family and operating voltage * - HX5000 ASIC elevated failure rate due to minimal Device-Hours (46,000).

  36. Product Reliability Calculation and Assumptions FIT rate calculation = c2[60%, 2(n+1)] / (2 x DevHrs x AFthermal x AFvoltage) Where: n = number of failures, AFthermal = Arrhenius, AFvoltage = eß(Vs - Vo) • Assumptions: • Use temperature (Ave) 55 °C • Life test temperature 150 °C • Use Vdd (Ave) 5.0V, 3.3V or 2.5V • Life test Vdd 5.5V (or 3.6V or 2.5V for Low Voltage SOI technologies) • Voltage Acceleration Constant (ß) • (SOI – IV/ Ve) ß = 1.25 • Performed over 400,000 hrs of Dynamic burn-in on 256K SRAM (SOI-IV) • (SOI-V) ß = 1.7 • Performed over 887,500 hrs of Static burn-in on SOI-V (4M SRAM and HX3000 TM) • (S150) ß = 2.0 • Activation Energy • (SOI –IV/ IVe) Ea = 0.7 eV • Dynamic burn-in on 256K SRAM (SOI-IV) at 125 and 150C. • Results on 2 studies totaling over 83,000 dev-hrs were 0.67 and 0.71eV. • (SOI-V) Ea = 0.6 eV • Performed over 887,500 hrs of Static burn-in on SOI-V (4M SRAM and HX3000 TM) • (S150) Ea = 0.7eV • Attached Capacitors (assumptions per supplier) • AFThermal = (Life Temp/Use Temp)8 , AFVoltage =(Life Voltage/ Use Voltage)

  37. Summary • Honeywell Is An Experienced, Fully Qualified Supplier Of Space • Microelectronics, Ready To Work With You To Apply Our Capabilities • To Your Programs • Digital And Mixed Signal ASICs, SRAMs, NVRAM, SERDES And • Multi-Chip Modules • Obsolete IC Replacements, Including FPGA To ASIC Conversions • Proprietary Technology Built In Our Own Trusted Foundry • - QML Certified Quality Systems In Place • - Semiconductor Industry Experienced Management Team • Let’s Use This Meeting To Answer Your Questions And Deepen Your • Understanding Of Our New Product Offerings Experienced, Qualified And Ready

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