ECE 1352F (2003) Analog Circuit Design Presentation. Integrated “Smart Power” IGBT Drivers. Kay (Tsz Shuen) Chan 993509681 November 28, 2003. Objectives. Introduce briefly some of the design considerations of IGBT drivers in power electronics
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Integrated “Smart Power”
Kay (Tsz Shuen) Chan
November 28, 2003
Discrete Power Converter (Switches)
- control logic
- diagnostic feedback
- power output stage
- etc …“Smart Power” IC
–> increase gate drive voltage
–> decrease series gate resistance
–> reduce tailing current
–> short minority carrier lifetime
–> Reduce overcurrent and overvoltage
–> Imply slower turn-on and turn off!!
(larger) to keep IRR small
stage-2 turn on (triggered
by VREF in comparator)
rapid discharge of Cgate
link voltage, stage-2 turns off
reducing current fall rate
DC link voltage = 100V at 8 kHz
Load current = 15A
connecting gate and collector
current source whose current is
proportional to capacitor current
By adjusting A, can change the total capacitance across gate and collector, and thus changing dv/dt
Vdc = 600V
VCC = 16V
IC = 20A
VEE = -5V
LLoad = 1mH
Rg = 40
(next step -> gate drive circuits realization)
 O. Trescases, “ECE1352 Term Paper: Integrated “Smart Power” IGBT Drivers”, 2003.
 M. H. Rashid, Power Electronics Handbook, San Diego: Academic Press, 2001.
 N. Kularatna, Power Electronics Design Handbook: Low-Power Components and Applications, Boston: Newnes, 1998.
 R.S. Chokhawala, J. Catt, and B.R. Pelly, “Gate Drive Considerations for IGBT Modules,” Industry Applications, IEEE Transactions on, vol. 31, no. 3, pp. 603-611, May-June 1995.
 S. Park and T. M. Jahns, “Flexible dv/dt and di/dt Control Method for Insulated Gate Power Switches,” Industry Applications Conference, 2001. 36th IAS Annual Meeting. Conference Record of the 2001 IEEE, vol. 2, pp. 1038-1045, Sept-Oct 2001.
 R. Sachdeva and E. P. Nowicki, “A Novel Gate Driver Circuit for Snubberless, Low-Noise Operation of High Power IGBT,” Electrical and Computer Engineering, 2002. IEEE CCECE 2002. Canadian Conference, vol. 1, pp. 212-217, May 2002.
 H. Nakatake and A. Iwata, “Series Connection of IGBTs used Multi-Level Clamp Circuit and Turn Off Timing Adjustment Circuit,” Power Electronics Specialist, 2003. PESC '03. IEEE 34th Annual Conference, vol. 4, pp. 1910-1915, June 2003.
 K. Sasagawa, Y. Abe, and K. Matsuse, “Voltage Balancing Method for IGBTs Connected in Series,” Industry Applications Conference, 2002. 37th IAS Annual Meeting. Conference Record, vol. 4, pp. 2597-2602, Oct 2002.