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Kabuki 2800

Kabuki 2800. team “ Big Country ” presents. “a real-time digital audio effects system for performance”. ECEN4610 Preliminary Design Review 14 September 2006. Agenda. Project overview Architecture Implementation Risk management Division of labor Schedule. OVERVIEW Design goal.

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Kabuki 2800

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  1. Kabuki 2800 team “Big Country” presents “a real-time digital audio effects system for performance” ECEN4610 Preliminary Design Review 14 September 2006

  2. Agenda • Project overview • Architecture • Implementation • Risk management • Division of labor • Schedule

  3. OVERVIEWDesign goal • Customizeable and extensible real-time digital audio effects system for live performance

  4. Project overviewTarget consumer • Live performance! • Electronic composers • Electronic musicians • Mic’ed acoustic musicians

  5. Project overviewCurrent status • Kabuki 1200 • Summer ‘06 • Some effects • Slider input • No custom effects • Slow display

  6. Project overviewKabuki 2800 baseline requirements • Computer control+display interface • Support for saved presets • Custom effects • Time-domain base effects • Portable

  7. Project overviewKabuki 2800 secondary requirements • Interchangeable human input board • FFT coprocessor for performance • Frequency-domain effects

  8. Block Diagram Summer Progress Kabuki 2800

  9. IMPLEMENTATION S F H How is it all going to work? Effects I/O Card Touchscreen Performance Module DSP Co-Processing

  10. Effects (on DSK) Filter and Equalizer FIR IIR Echo & Reverb Buffering Flange Fancy Buffering Granulation Crazy Buffering Pitch Time Shifting -FFT and/or wavelet transform Etc..

  11. I/O Card EMIF Computer Interrupts

  12. I/O Card • FPGA Altera Cyclone I/II • 3-8ns propogation • low-cost • FIFO “MegaFunction” Clock Source: buffered clock from EMIF

  13. I/O Card • USB: • DLP Designs USB to parallel module • (USB Control Cores for FPGAs) • RS-232 • MAX3232 • 1Mbit/s • 2Tx & 2Rx • EMIF bus: (drive and voltage change) • MAX3000E • Converts voltage levels from 1.2 <-> 5.5 Volts • Mostly PCB and some Wire-Wrap

  14. Performance Module • FPGA to handle communication and device polling. • 4-5 foot buttons • (Directly into logic device) • 1-2 Pedals • Pedals act as attenuators • Feed 5V signal • AD7861 (ADC with 11bit resolution) • Low speed • PLCC 44 package • Clock Source: Crystal Oscillator (1MHz)

  15. DSP Co-processorTMS3206713B-200 HPI • 200pin HLQFP • Not BGA!!! • Connection • through Host Peripheral Interface on DSK • 192K internal SRAM • Maybe enough! • Clock Source: • same as DSK, 50MHz Crystal Oscillator.

  16. Touch ScreenMotion Computing M1300 • Slate style tablet: large screen • Linux • Preset Programming • Slider Display

  17. Development Structure Primary Secondary Kabuki 2800

  18. Dan’s Tasks Primary • Software Effects • Software Devices • Software simulation Secondary • Layout design and fabrication. • Firmware Kabuki 2800

  19. Justin’s Tasks Primary • I/O Layout Design and Fabrication • Firmware • USB design and Protocols Secondary Does No have any. Kabuki 2800

  20. Tim’s Tasks Primary • Performance board firmware • layout and design Secondary • USB Design and Protocols • Device Casing Kabuki 2800

  21. Yazan Task’s Secondary • Module hardware design • Module Firmware design • Audio effect algorithm simulation • Audio effect algorithm • Final packaging and Software Primary • Device Casing and Fabrication • DSK and interface Card Kabuki 2800

  22. Schedule • Phase 1 – Milestone 1, Nov. 2 • Phase 2 – Milestone 2, Nov. 30 • Phase 3 – Expo, Dec. 14

  23. Phases • Phase 1 – Development & Prototyping • Phase 2 – Integration • Phase 3 – Testing and Production

  24. Performance BoardPhase 1 • FPGA configured • FPGA boots from EEPROM • FLASH reads/writes properly • DSK I/O Firmware Complete • USB tested • RS-232 interface tested

  25. Performance BoardPhase 2 • FPGA configured and tested

  26. I/O BoardPhase 3 • All interfaces fully functional (RS-232, USB) • Flash storage able to load / store presets • I/O functions with DSK and DSP co-processor • USB firmware interfaces with FPGA and with host computer • RS-232 interface fully functioning • Firmware completed and under testing • Communication established with DSP coprocessor.

  27. Performance BoardPhase 1 • FPGA configured and tested • FPGA boots from EEPROM • A/D converter tested • Firmware in testing

  28. Performance BoardPhase 2 • FPGA interfaces with I/O board • Foot – pedals generate interrupts • A/D converter samples fader pedal

  29. Performance BoardPhase 3 • FPGA interfaces with Interface Card • All user inputs are fully functional

  30. DSP Coprocessor Phase 1 • Board Layout Complete

  31. DSP Coprocessor Phase 2 • Board fabricated, populated and ready for testing • JTAG ready

  32. DSP Coprocessor Phase 3 • DSP Processor is able to implement FFT and Wavelet Transforms • DSP is able to communicate with I/O board and and co-process transforms

  33. Effect Algorithms Phase 1 • Time Domain Effects Simulated • Phasing • Filters • Etc.

  34. Effect Algorithms Phase 2 • Most time domain effects simulated • Several more time domain effects implemented • FFTs simulated in Matlab

  35. Effect Algorithms Phase 3 • Time Domain effects implemented • FFT and Wavelet Domain effects simulated and implemented

  36. RISKS AND CONTINGENCY PLAN • Sources of Risk • USB interface • RS-232 interface • DSP co-processor • Touch-screen interface

  37. USB FIFO Interface • RISKS: • Needs Windows DLLs to be recognized • Must interface with FPGA • Timing • CONTINGENCY PLAN • USE RS-232 • USE Preprogrammed Flash Memory

  38. RS-232 Interface • RISKS • Communication is not fast enough • Timing • CONTINGENCY PLAN • Make the performance board stackable on top of the existing DSK

  39. DSP co-processor • RISKS: • Timing • Memory • Interface • CONTINGENCY PLAN: • Eliminate effects that need extensive FFT / wavelet processing • Use the existing DSK to implement transforms

  40. Touch-screen Interface • RISKS: • USB must work • We must be able to access the Windows dll files to monitor touches • We must be able to monitor touches on the screen in real-time • CONTINGENCY PLAN: • Use sliders / faders

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