Co-simulation. Slides from: - Tony Givargis, Irvine, IC253 - Rabi Mahapatra, Texas A&M University - Sharif University. Abstraction. Relative-speed. Verification Time. Real-time. 1. 1 hour. FPGA. 10 -1. ~1 day. Emulator. 100 -1. ~4 days. Behavior (system-level). 1000 -1.
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- Tony Givargis, Irvine, IC253
- Rabi Mahapatra, Texas A&M University
- Sharif University
Bus functional (system-level)
Cycle accurate (system-level)
~1 MillenniumVerification via Simulation
Set data values
Examine system/environment values at any time
Can step through small intervals (i.e., 500 nanoseconds)
Simulation setup time (i.e., could spend more time modeling environment than system)
Models likely incomplete
Simulation speed much slower than actual executionVerification via Simulation
Co-sim glue logic
Event Cycle Dataflow