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LECTURE 23 amplification and switched power supplies avalanche breakdown Kirk effect GaAs HBT Si L-DMOSFET Si IGBT

LECTURE 23 amplification and switched power supplies avalanche breakdown Kirk effect GaAs HBT Si L-DMOSFET Si IGBT

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## LECTURE 23 amplification and switched power supplies avalanche breakdown Kirk effect GaAs HBT Si L-DMOSFET Si IGBT

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**Transistors for high power applications**• LECTURE 23 • amplification and switched power supplies • avalanche breakdown • Kirk effect • GaAs HBT • Si L-DMOSFET • Si IGBT**Some examples**Cell-phone base stations e.g., VoxTechnologies Switched-mode power supplies e.g., NXP**Operational requirements**• High power delivery means high IDVDS or ICVCE • High current necessitates large area to avoid meltdown • High voltage necessitates high breakdown voltage to avoid avalanche breakdown**Sec. 16.1**Avalanche breakdown**Sec. 16.1**Design for high avalanche breakdown Consider an HBT x Use the triangular E-x profile to get an expression for VJ Should Nepi be low or high to get a high Vbr ?**Breakdown strength of semiconductors**Sec. 16.1**Base push-out: the Kirk Effect**Sec. 16.1 • High current means high |qn|. • What are the implications of this for making the Depletion Approximation? • How must Poisson’s equation be modified? • Why does this have an adverse effect on fT ? Roenker et al., Semicond. Sci. Techn., 19, 1131-37, 2004**GaAs HBT for high-power ampifier**Sec. 16.3.1 What 5 features of this transistor make it suitable for high-power amplification?**Switched-mode power supply**Sec. 16.4 Why are MOSFETs preferred for this application? What are the body and drain doping densities in high-performance MOSFETs? How can breakdown be avoided at the body/D junction?**Si L-D MOSFET**Sec. 16.4.1 How does this device achieve a high Vbr and a low ON resistance? http://www.nxp.com/acrobat_download2/literature/9397/75016655.pdf**Lateral IGBT**Sec. 16.4.2 • LIGBT, LDMOSFET: • what’s the difference • physically, • electrically?**Lateral IGBT**Sec. 16.4.2 OFF STATE, VGK < VT If VAK > 0, JI in RB depletion region can reach through to n buffer, i.e., high FBV. If VAK < 0, J3 in RB, and this determines RBV**Lateral IGBT**Sec. 16.4.2 ON STATE, VGK > VT , electrons injected into base and n-epi potential lowered. If VAK > 0, J3 in FB, holes injected into base and are collected by K i.e., bipolar action with MOSFET emitter. What’s the advantage to having a MOS “input”? Is this device fast?**IGBT circuit and I-V**J3 OFF ON**High current**Sec. 16.4.2