A 4 bit serial to parallel converter
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A 4 bit Serial to Parallel Converter . Jason Baechler Benjamin Liu Forozan Amely Trang Nguyen. Introduction. Our project is to design a 4 bit serial to parallel data stream converter. Project Specification. 25Mhz Clock 50% clock duty cycle Power is less than 500 mW Vth = 2.5 V

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A 4 bit serial to parallel converter

A 4 bit Serial to Parallel Converter

Jason Baechler

Benjamin Liu

Forozan Amely

Trang Nguyen


Introduction
Introduction

  • Our project is to design a 4 bit serial

    to parallel data stream converter


Project specification
Project Specification

  • 25Mhz Clock

  • 50% clock duty cycle

  • Power is less than 500 mW

  • Vth = 2.5 V

  • Output Buffer drives 10pF load

  • Area is less than 40 mm^2


Schmitt trigger
Schmitt Trigger

  • Reduces the noise at the input

  • Wnf = 8 um

  • Wpf = 225 um





Clock
Clock

  • to take a serial stream at 25Mhz:

    - clock period = 40ns

    - for minimizing the skew, a fat bus was used for clock

    - Pick up 1/10 of the clk period for the Tf and Tr for 4ns













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