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# Random Logic Approach PowerPoint PPT Presentation

Random Logic Approach The approach described so far is called a random logic approach and is a complicated logic design exercise. Each design is unique and depends upon the instruction set and the internal arrangements. The method does not lend itself to modifications afterwards.

Random Logic Approach

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Random Logic Approach

The approach described so far is called a random logic approach and is a complicated logic design exercise.

Each design is unique and depends upon the instruction set and the internal arrangements.

The method does not lend itself to modifications afterwards.

ITCS 3181 Logic and Computer Systems 2014 B. Wilkinson Slides8.ppt Modification date: March 24, 2014

This material is now historical and given for completeness.

Microprogrammed Approach

Wilkes (in 1951) suggested an alternative approach for control unit design called microprogramming.

Each elementary step is encoded into a binary pattern in much the same way as machine instructions, and held in a memory within the control unit.

Not widely adopted until the 1960’s but particularly convenient for complex instruction sets. Generally not used in simple RISC designs.

Confident! Note 1951.

Wilkes, Maurice (1951). "The Best Way to Design an Automatic Computing Machine". Report of Manchester University Computer Inaugural Conference. pp. 16–18.

Microprogrammed Control Unit Design

Operations for each state encoded in binary in an instruction known as a microinstruction(a small instruction)

Each microinstruction will cause the signals necessary to transfer data from one place to another in the processor, and activates functional units if necessary for the operation.

Microprogram – A list of microinstructions for each machine instruction.

Microprogramheld in a very high speed memory called the control memory within the control unit of the processor.

Microprogrammed Control Unit - Basic Concept

Microinstruction Formats

1. Horizontal Microinstruction Format

One bit for each possible signal that might need to be generated by any microinstruction - leads to the fastest execution:

Example

MARPC

Requires d bits if there are d possible destinations plus s bits if there are s possible sources.

2. Vertical Microinstruction Format

Mutually exclusive operations grouped together and encoded in binary. Reduces number of bits in microinstruction. Each vertically encoded field needs a decoder:

Example

Suppose there were up to 15 possible sources and destinations (PC, MAR, MDR, IR ....). Four bits needed to specify which one:

EncodingDestinationSource

0000NoneNone

0001RdRs1

0010.Rs2

0011IR.

0100.IR15-0

0101.IR25-0

0110.0 (zero)

0111R314 (constant)

1000PCPC

1001MDRMDR

1010MARMAR

...

One pattern for no signals

Various parts of IR

Used in Branch

Used to increment PC

This is just an example of how it could be encoded, but this will be used later.

Vertical Format Microinstruction Encoding

Example

MAR PC

More Complex Operations

Vertical encoding typically used to select arithmetic functions, etc.

Example

PCPC + IR25-0

Need two sources, destination and arithmetic operation specified in microinstruction:

Possible ALU function Encoding

EncodingALU function

0000None (ALUout = ALUin1)

0010Subtract

0011Multiply

0100Divide

0101AND

0110OR

0111Shift left

1000Shift right

1001.

Again this is just an example of how it could be encoded, but it will be used later.

Example Encoded Microinstruction

PC PC + IR25-0

Microinstruction Sequencing

Need a mechanism to specify next microinstruction to be executed.

Original (Wilkes) method was to hold the address of the next microinstruction in a field within the microinstruction (so-called four-address instruction format):

Microprogram counter

More convenient approach for microinstructron sequencing is to use a microprogramcounter to hold the address of the next microinstruction just as machine instruction sequencing uses a program counter.

Then simply increment the microprogram counter after each microinstruction is fetched in preparation for fetching the next microinstruction.

Branch Microinstructions

Needed for implementing branch machine instructions.

Also useful for implementing a complex machine instruction with microinstructions.

Original Wilkes method: Used a microinstruction with two “next microinstruction” addresses, one for identifying state if condition true and one for identifying the state if the condition is false.

In our case with a microprogramcounter: - Only need to hold branch target in the “next microinstruction” address field in microinstruction.The microprogram counter holds the address of next sequential microinstruction.

In either case, logic to select one address depending upon whether the condition had been met.

Branch Microinstructions

In our design, need to implement:

All branch sequences are similar.

BL instruction

State 21

Rs1 - 0 (compare Rs1 against zero)

if (negative) gotostate 22 else gotostate 0

This can be simplified by arranging state 22 to be immediately after state 21 in the microprogram.

Then state 21 reads:

Rs1 - 0 (compare Rs1 against zero)

if (positive) gotostate 0

where condition is the opposite to that previously.

Microinstruction with Conditional Branch Operations

Example

Again this is just an example of how it could be encoded, but it will be used later.

Conditional Branch Microinstruction Example

Rs1 - 0; if (negative) goto branch location

Using previous encoding.

Number of bits in branch address depends upon maximum size of the control memory.

Can also use two different formats, one for non-branch and one for branch to reduce wasted space in microinstruction (first bit specifies format).

Other Operations

Other operations include:

Could have one bit for either:

MDR  [MAR]

Memory Write

[MAR]  MDR

Final Microprogram

Fetch Cycle

Could be done in microcode or by special hardwired logic. Suppose done in microcode starting at location 0 in control memory:

Control memoryMicroprogram

T0:MAR  PC0000101000001000000000 000 0... 0

T1:MDR  [MAR]0001000000000000000001 000 0... 0

T2:IR  MDR0010001100001001000000 000 0... 0

T3:PC  PC + 40011100000011000011100 000 0... 0

Subsequently, we will assume step T3done using separate logic at same time as step T2.

Execute Cycle

Selecting Execute Microcode

At the end of fetch cycle, need to select the start of the microprogram (microcode) for the specific fetched machine instruction.

Generally, the op-code of the machine instruction can be used.

The fetched machine instruction will be in the instruction register (IR) at this time.

Fetch Mapping ROM

Convenient to use a read-only memory (ROM).

Opcodeused to select location in mapping ROM. Contents of addressed location holds address of microinstruction in control memory:

Example

Suppose opcode pattern is 000110, and location 120 in control memory holds first microinstruction of microprogram to execute machine instruction.

Selecting Execute Microcode

Need to have the step: “branch to location specified by op-code mapping ROM” at the end of fetch cycle.

We shall choose to provide new field called here select, defined as follows:

select

00Next address given by microprogram counter (i.e. default for sequential execution)

01Next address given by op-code mapping ROM

10Next address given by branch address field of microinstruction if condition exists (i.e. for branch microinstructions)

Pattern 11available and could be used to implement microinstruction subroutines, see later.

Next Address Select Field

Final microinstruction format for our design. There could be other miscellaneous operations.

Microprogrammed Control Unit Design

Alternative Designs-- Clearly there are many alternative designs. We have used mainly vertical encoding but this does lead to slower operation.Often horizontal encoding is used with very long microinstruction lengths (100 bits or more).

Questions