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Physical Design Tool for Two-Row Standard Cell Design

This project aims to implement a physical design tool for a two-row standard cell design, addressing problems such as component positions, partitioning, placement, and interconnect routing optimization.

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Physical Design Tool for Two-Row Standard Cell Design

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  1. CSE 144 Project

  2. Overall Goal of the Project • Implement a physical design tool for a two-row standard cell design 3 5 0 2 1 4

  3. Problems to be resolved • Positions of components • Which row to place each component: Partitioning • The relative position of components in each row: Placement • Interconnect between components: Routing

  4. What to optimize? • In partitioning: minimize the number of interconnects between partitions (rows) • In placement: minimize the overall horizontal length of interconnects • In routing: fulfill the geometrical constraints --- wires in the same directions should not overlap

  5. Input Specification • Matrix form circuit model: • First line: the number of components, N • The following N lines: the output-input connections between components • A non-zero entry Aij denotes a connection between components i and j • The value of Aij denotes the pin number of i • Last line: the size of each components

  6. Output Specification Partitioning & Placement • Routing • Position of pins connected by each net • Leftmost and rightmost boundaries of each nets • Channel track occupied by each net

  7. Part 1: Partitioning • Goal: minimize the number of interconnects crossing the two rows • Constraints: partition size should stay within a tolerance window The tolerance bound is the size of the largest component: floor(|V|/2 - Cmax) <= |A| <= ceiling( |V|/2 + Cmax)

  8. Fundamental Ideas • The flow of FM algorithm is the same as KL algorithm • Two differences: • KL: component swap per tentative move FM: one component per tentative move • KL: any pair of unlocked components valid FM: only allow moves fulfilling area constraints

  9. Algorithm • Initial partitioning (subject to area constraints) • Gain calculation (same equations as in KL) • Move and lock the component with highest gain, which satisfies area constraints (one component per tentative move). Update gains. • Repeat moving until no one can be moved • Make permanent all the movements up to and including the move giving the highest accumulative gain • Unlock all components and repeat until no improvement can be obtained

  10. How to improve efficiency? • Gain updating technique • Locked components needn’t be updated • Components unconnected to the ones being moved needn’t be updated • Use efficient data structure • Three data structure candidates provided

  11. Data Structure 1: Linked List Gain stamps Unlocked components Gmax Current max gain 3 Comp 5 Comp 0 NIL 2 Comp 1 Comp 3 NIL 1 0 Comp 4 NIL -1 • Always choose component in the highest linked list for tentative move • Gain updating corresponds to changing the position of components in the linked lists -2 -3 -Gmax

  12. Data Structure 2: Gain Matrix Components c0 c4 c2 c3 c5 c1 1 1 3 • Always choose component in the highest row that contains 1-entries • Gain updating corresponds to changing the positions of 1-entries in the gain matrix 1 1 2 1 Gain value 1 0 1 -1 -2 -3

  13. Data Structure 3: Gain Array Components Gain updating corresponds to changing the values of the gain array elements c0 c1 c2 c3 c4 c5 3 2 -1 2 0 3 Gain

  14. Implementation Requirement • Analyze the suggested data structures in terms of • Primarily computational efficiency • Secondarily space efficiency • Implement the most efficient one you think • Provide a detailed description of your analysis in your turn-in

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