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Computer Organization Lecture 17

Computer Organization Lecture 17. Controller design Microprogramming overview. From Lecture 12. MIPS controller. Outputs. Outputs. Inputs IR(31:25). Outputs. Inputs. NS Decoder. Output Decoder. Present State. Flip Flops. Combo logic ROM MUX Decoder. Combo logic ROM MUX.

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Computer Organization Lecture 17

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  1. Computer OrganizationLecture 17 Controller design Microprogramming overview University of Portland School of Engineering

  2. From Lecture 12 MIPS controller Outputs Outputs Inputs IR(31:25) University of Portland School of Engineering

  3. Outputs Inputs NS Decoder Output Decoder Present State Flip Flops Combo logic ROM MUX Decoder Combo logic ROM MUX FSM architecture University of Portland School of Engineering

  4. Ten one-bit outputs University of Portland School of Engineering

  5. Three two-bit outputs University of Portland School of Engineering

  6. 2 Clk 1-3 Clk State diagram overview All instructions require IF, ID (2 clk’s) University of Portland School of Engineering

  7. Full FSM state diagram Inputs:Op Outputs: 13 signals States: 10 University of Portland School of Engineering

  8. MDP16 controller Inputs IR(15:0) Outputs University of Portland School of Engineering

  9. Outputs Inputs NSD ROM Output Decoder PS flip-flops Controller architecture ROM contains microprogram University of Portland School of Engineering

  10. Controller overview • Inputs: IR[0:15], EQ • Outputs: ~15 signals • Present state: 32-bits • NSD or ROM: 256x32 University of Portland School of Engineering

  11. NSD PS Inputs Outputs MDP16 controller University of Portland School of Engineering

  12. Controller outputs University of Portland School of Engineering

  13. Controller outputs, continued. University of Portland School of Engineering

  14. Controller outputs, continued. University of Portland School of Engineering

  15. Controller outputs, continued. University of Portland School of Engineering

  16. Controller internals University of Portland School of Engineering

  17. Which output is asserted? University of Portland School of Engineering

  18. Microprogramming overview • Review instructions, understand goals • Determine state diagram • Microprogram individual instructions • List tokens on one line • Repeat for remaining clocks • Merge all instructions • Test, test, test University of Portland School of Engineering

  19. .upg .txt B2Logic MicroAsm Source File Object File Assembler ROM Microprogramming steps ROM contents defined by assembler University of Portland School of Engineering

  20. MicroAsm • Java application: MicroAsm.class, SavitchIn.class • Microinstruction: free format, no fixed fields • Requires input file: text-only, file.upg • Creates output file: file.txt • Errors: command line file name,file I/O, unrecognizable token • Execution: BlueJ or DOS command line University of Portland School of Engineering

  21. BlueJ execution Must pass input file name to main method University of Portland School of Engineering

  22. Output file defines control ROM Address Data University of Portland School of Engineering

  23. MDP16 op codes University of Portland School of Engineering

  24. MDP16 op codes, continued. University of Portland School of Engineering

  25. How many microinstructions? University of Portland School of Engineering

  26. How many microinstructions? University of Portland School of Engineering

  27. A B Reset Lw or Sw R-fmt C Beq Jump G I J Sw Lw D F H E Partial MDP16 state diagram University of Portland School of Engineering

  28. ID IF Reset 2 clocks sll srl lw sw R-fmt nop 1- 3 additional clocks j beq addi subi andi ori MDP16 state diagram University of Portland School of Engineering

  29. University of Portland School of Engineering

  30. Which output is asserted? University of Portland School of Engineering

  31. How many microinstructions? University of Portland School of Engineering

  32. How many microinstructions? University of Portland School of Engineering

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