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“Fault Resilience for HPC Applications on Exascale Systems” – Dan Quinlan, LLNL

“Fault Resilience for HPC Applications on Exascale Systems” – Dan Quinlan, LLNL. Create an automated compiler transformation to assist programmers in DOE for integrating memory-related fault resilience in their applications :

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“Fault Resilience for HPC Applications on Exascale Systems” – Dan Quinlan, LLNL

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  1. “Fault Resilience for HPC Applications on ExascaleSystems” –Dan Quinlan, LLNL Create an automated compiler transformation to assist programmers in DOE for integrating memory-related fault resilience in their applications : Creating memory efficient fault resilience technique at compiler level Automatically introduce runtime fault resilience checks with some support for error correction capability Automated approach to addressing the resilience challenge of exascale computing Assist application sustainability in ExaScale environments where memory failures may occur every 2 hours [DARPA ExaScale Study 2008 Report] ASCR- Computer Science Highlight Impact Objectives Accomplishments 2011 Scientific Application ROSE Compiler Transformation Instrumented Application ( Fault Resilience Checks ) • Developed compiler transformation for instrumenting memory references in scientific kernels with fault resilience checks • Designed a library to support runtime detection of memory errors • Implemented a fault resilience technique with block parity algorithm Runtime Support ( Block Parity Algorithm ) Application Execution Memory Reference Hashmap No Error ( Normal output) Errors Corrected ( Normal output) Errors Detected ( Exception )

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