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Timers

Timers. Chapter 10 9S12DP256. Timers. The 9S12DP256 Programmable Timer Output Compares Pulse Train Using Interrupts Input Capture Measuring the Period of a Pulse Train Using Interrupts. PIM_9DP256 Block Diagram. Timer Counter. Timer System Control Register 1.

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Timers

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  1. Timers Chapter 10 9S12DP256

  2. Timers • The 9S12DP256 Programmable Timer • Output Compares • Pulse Train Using Interrupts • Input Capture • Measuring the Period of a Pulse Train Using Interrupts

  3. PIM_9DP256 Block Diagram

  4. Timer Counter

  5. Timer System Control Register 1

  6. Setting the timer count time

  7. Timers • The 9S12DP256 Programmable Timer • Output Compares • Pulse Train Using Interrupts • Input Capture • Measuring the Period of a Pulse Train Using Interrupts

  8. \ Delay using 9S12DP256 output compare timer functions. File: OC_DELAY.WHP HEX 0040 CONSTANT TIOS \ Timer Input Cap.\Output Comp. Select 0044 CONSTANT TCNT \ Timer Counter Register 0046 CONSTANT TSCR1 \ Timer System Control Register 1 004D CONSTANT TSCR2 \ Timer System Control Register 2 004E CONSTANT TFLG1 \ Timer Interrupt Flag Register 1 005C CONSTANT TC6 \ Timer Output Compare Register 6 \ Use output compare 6 for a 25 msec delay : TIMER.INIT ( -- ) \ Initialize timer 40 TIOS C! \ select output compare 6 32 TSCR2 C! \ div by 4: 2 MHz timer clock 80 TSCR1 C! ; \ enable timer : C6F.CLR ( -- ) \ Clear C6F - bit 6 - in TFLG1 ) 40 TFLG1 C! ;

  9. DECIMAL : 25.MSEC ( cnt -- cnt' ) \ wait 25 msec. 50000 + \ add 50000 to prev cnt DUP TC6 ! \ store in output compare 6 reg C6F.CLR \ clear output compare 6 flag BEGIN \ wait for timeout 6 TFLG1 ?HI UNTIL ; : S.DELAY ( n -- ) \ delay n seconds TIMER.INIT 40 * \ no. of 25.msec delays TCNT @ SWAP \ cnt # FOR 25.MSEC NEXT DROP ;

  10. Pulse Train Example

  11. \ Pulse train using output compares 7 and 6. File: PULSE.WHP HEX 0040 CONSTANT TIOS \ Timer Input Cap.\Output Comp. Select 0042 CONSTANT OC7M \ Output Compare 7 Mask Register 0043 CONSTANT OC7D \ Output Compare 7 Data Register 0044 CONSTANT TCNT \ Timer Counter Register 0046 CONSTANT TSCR1 \ Timer System Control Register 1 0048 CONSTANT TCTL1 \ Timer Control Register 1 004D CONSTANT TSCR2 \ Timer System Control Register 2 004E CONSTANT TFLG1 \ Timer Interrupt Flag Register 1 005C CONSTANT TC6 \ Timer Output Compare Register 6 005E CONSTANT TC7 \ Timer Output Compare Register 7 DECIMAL VARIABLE P_WIDTH 6625 P_WIDTH ! VARIABLE PERIOD 17500 PERIOD ! HEX : TINIT ( -- ) C0 TIOS C! \ select output compares 6 & 7 02 TSCR2 C! \ div by 4: 2 MHz timer clock 80 TSCR1 C! \ enable timer TCNT @ DUP TC6 ! TC7 ! \ init cnt in TC6 & TC7 6 OC7M HI \ pulse train out PT6 6 OC7D LO \ PT6 goes low on TC7 match 4 TCTL1 HI 5 TCTL1 HI ; \ set PT6 high on TC6 match

  12. : CLR.C76 ( -- ) \ clear both C7F and C6F C0 TFLG1 C! ; : PULSE ( -- ) TINIT BEGIN TC7 @ CLR.C76 PERIOD @ + DUP TC7 ! \ TC7new = TC7old + PERIOD P_WIDTH @ + TC6 ! \ TC6 = TC7new + P_WIDTH BEGIN \ wait for PT6 to go low on 6 TFLG1 ?HI \ TC7 match and the high on UNTIL \ TC6 match AGAIN ; DECIMAL

  13. Timers • The 9S12DP256 Programmable Timer • Output Compares • Pulse Train Using Interrupts • Input Capture • Measuring the Period of a Pulse Train Using Interrupts

  14. Pulse Train

  15. \ Pulse train using output compares 7 and 6. File: PULSEI.WHP HEX 0040 CONSTANT TIOS \ Timer Input Cap.\Output Comp. Select 0042 CONSTANT OC7M \ Output Compare 7 Mask Register 0043 CONSTANT OC7D \ Output Compare 7 Data Register 0044 CONSTANT TCNT \ Timer Counter Register 0046 CONSTANT TSCR1 \ Timer System Control Register 1 0048 CONSTANT TCTL1 \ Timer Control Register 1 004C CONSTANT TIE \ Timer Interrupt Enable Register 1 004D CONSTANT TSCR2 \ Timer System Control Register 2 004E CONSTANT TFLG1 \ Timer Interrupt Flag Register 1 005C CONSTANT TC6 \ Timer Output Compare Register 6 005E CONSTANT TC7 \ Timer Output Compare Register 7 3FE2 CONSTANT TC6.IVEC \ Timer Channel 6 interrupt vector DECIMAL VARIABLE P_WIDTH 6625 P_WIDTH ! VARIABLE PERIOD 17500 PERIOD ! HEX : TINIT ( -- ) C0 TIOS C! \ select output compares 6 & 7 00 TSCR2 C! \ div by 1: 8 MHz timer clock 80 TSCR1 C! \ enable timer TCNT @ DUP TC6 ! TC7 ! \ init cnt in TC6 & TC7 6 OC7M HI \ pulse train out PT6 6 OC7D LO \ PT6 goes low on TC7 match 4 TCTL1 HI 5 TCTL1 HI \ set PT6 high on TC6 match 40 TIE C! ; \ enable TC6 interrupts

  16. : CLR.C76 ( -- ) \ clear both C7F and C6F C0 TFLG1 C! ; INT: TC6.INTSER ( -- ) TC7 @ PERIOD @ + DUP TC7 ! \ TC7new = TC7old + PERIOD P_WIDTH @ + TC6 ! \ TC6new = TC7new + P_WIDTH CLR.C76 RTI; : SET.TC6.INTVEC ( -- ) [ ' TC6.INTSER ] LITERAL TC6.IVEC ! ; : PULSEI ( -- ) SEI TINIT SET.TC6.INTVEC CLI ; DECIMAL

  17. Timers • The 9S12DP256 Programmable Timer • Output Compares • Pulse Train Using Interrupts • Input Capture • Measuring the Period of a Pulse Train Using Interrupts

  18. Input Capture

  19. \ Use input capture to measure width of single pulse. File: PWIDTH.WHP \ Polling mode -- no interrupts \ Use TC2 -- signal on PT2 HEX 0040 CONSTANT TIOS \ Timer Input Cap.\Output Comp. Select 0044 CONSTANT TCNT \ Timer Counter Register 0046 CONSTANT TSCR1 \ Timer System Control Register 1 004B CONSTANT TCTL4 \ Timer Control Register 4 004D CONSTANT TSCR2 \ Timer System Control Register 2 004E CONSTANT TFLG1 \ Timer Interrupt Flag Register 1 0054 CONSTANT TC2 \ Timer Input Capture Register 2 : TIC.INIT ( -- ) 0 TIOS C! \ select all input captures 0 TSCR2 C! \ div by 1: 8 MHz timer clock 80 TSCR1 C! ; \ enable timer

  20. : PULSE.WIDTH ( -- n ) \ Measure width n of pulse TIC.INIT \ initialize timer input capture 5 TCTL4 LO \ capture on rising edge 4 TCTL4 HI 04 TFLG1 C! \ clear C2F flag BEGIN 2 TFLG1 ?HI \ wait for rising edge UNTIL TC2 @ \ t1 04 TFLG1 C! \ clear C2F flag 5 TCTL4 HI \ capture on falling edge 4 TCTL4 LO BEGIN 2 TFLG1 ?HI \ wait for falling edge UNTIL TC2 @ \ t1 t2 04 TFLG1 C! \ clear C2F flag SWAP - ; \ width = (t2 - t1) DECIMAL

  21. Timers • The 9S12DP256 Programmable Timer • Output Compares • Pulse Train Using Interrupts • Input Capture • Measuring the Period of a Pulse Train Using Interrupts

  22. \ Measuring the period of a pulse train. File: PERIOD.WHP HEX 0040 CONSTANT TIOS \ Timer Input Cap.\Output Comp. Select 0044 CONSTANT TCNT \ Timer Counter Register 0046 CONSTANT TSCR1 \ Timer System Control Register 1 004B CONSTANT TCTL4 \ Timer Control Register 4 004C CONSTANT TIE \ Timer Interrupt Enable Register 004D CONSTANT TSCR2 \ Timer System Control Register 2 004E CONSTANT TFLG1 \ Timer Interrupt Flag Register 1 004F CONSTANT TFLG2 \ Timer Interrupt Flag Register 2 0052 CONSTANT TC1 \ Timer Input Capture Register 1 3FEC CONSTANT TC1.IVEC \ Timer Channel 1 interrupt vector 3FDE CONSTANT TOF.IVEC \ Timer overflow flag interrupt vector VARIABLE OVCNT \ timer overflow count VARIABLE OVCNT.OLD \ old timer overflow count VARIABLE TC1.OLD \ old TC1 VARIABLE DPERIOD 2 VALLOT \ double word period dH dL : INIT.IC ( -- ) C0 TIOS C! \ select input capture 1 00 TSCR2 C! \ div by 1: 8 MHz timer clock 80 TSCR1 C! \ enable timer 3 TCTL4 LO 2 TCTL4 HI \ rising edge of TC1 02 TFLG1 C! \ clear any old flags 80 TFLG2 C! \ clear TOI flag 7 TSCR2 HI \ enable TOI interrupt 1 TIE HI ; \ enable TC1 interrupt

  23. \ Timer overflow interrupt routine INT: TOF.INTSER ( -- ) 1 OVCNT +! \ inc OVCNT 80 TFLG2 C! \ clear TOF RTI; \ Input capture 1 interrupt routine INT: TC1.INTSER ( -- ) TC1.OLD @ OVCNT.OLD @ \ ic.o ov.o TC1 @ DUP TC1.OLD ! \ ic.o ov.o ic OVCNT @ DUP OVCNT.OLD ! \ ic.o ov.o ic ov 2SWAP D- \ spL spH DPERIOD 2! \ store period in DPERIOD 02 TFLG1 C! \ clear C1F RTI; \ Set interrupt vectors : SET.TOF.INTVEC ( -- ) [ ' TOF.INTSER ] LITERAL TOF.IVEC ! ; : SET.TC1.INTVEC ( -- ) [ ' TC1.INTSER ] LITERAL TC1.IVEC ! ;

  24. \ Main program : MAIN ( -- ) SEI \ set interrupt flag SET.TOF.INTVEC \ set interrupt vectors SET.TC1.INTVEC INIT.IC \ init input capture CLI ; \ clear interrupt flag DECIMAL

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