1 / 20

General information

General information. Course web page: http://www.cs.bgu.ac.il/~shimony/ arch2006/arch_main.html Office hours:- Prof. Eyal Shimony: Sunday: 13-14, 16-17 Room 204 TAs- LAB assistants: Guy Shatach (guyshat@cs.bgu.ac.il) Syllabus: (see web page) 1) Patterson & Hennessy

tacita
Download Presentation

General information

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. General information Course web page: http://www.cs.bgu.ac.il/~shimony/arch2006/arch_main.html Office hours:- Prof. Eyal Shimony: Sunday: 13-14, 16-17 Room 204 TAs- LAB assistants: Guy Shatach (guyshat@cs.bgu.ac.il) Syllabus: (see web page) 1) Patterson & Hennessy 2) NASM online manual 3) ABEL: IBM PC-ASSEMBLER

  2. Goals and Expectations • Computer organization: • Principles (advanced) • Case studies • Computer architectures: • Principles (advanced) • Case studies • Assembly and machine language • Principles • Case studies • HANDS ON experience • Integration and applications • Architectures and assemb. Language: • - Ability tol earn new machine types from MANUALS, ON YOUR OWN.

  3. Why Bother? • Why bother? All software today is in JAVA • or some other HLL anyway? • Essential for understanding (lower level of) COMPILERS, LINKERS, OS. • Architecture has impact on performance. Writing a program for better PERFORMANCE, even in a HLL, requires understanding computer architecture. • Some EMBEDDED CPUs or SPECIALIZED controllers - only assembly language available (or even just machine code). • Some software (e.g. a small part of the OS) STILL done in assembly language. • Better understanding of security aspects. • Viruses and anti-viruses. • Reverse engineering, hacking, and patching.

  4. Role of Course in Curriculum • Understanding of PHYSICAL implementations of structures from data-structures course. • Can be seen as high-level of ``Digital Systems'' course. • Understanding of computer operation at the subsystem level. • Leads up to ``Systems Programming'‘ and “Operating Systems” as an ``enabling technology'‘ • Compilers course - compilers use assembly language or machine code as end product.

  5. Course outline • LECTURES: • Introduction. (week 1) • Basic LOW-LEVEL programming issues. (weeks 2-6) • Advanced LOW-LEVEL prog. (weeks 7-9) • Issues in modern architecture (weeks 10-12) • Communication. (week 13) • LABS: • Simple program. (week 2 or 3)

  6. Programmer's View of Computing • To program a computer: • Write a program in a source language (e.g. C) • COMPILER converts program into MACHINE CODE or ASSEMBLY LANGUAGE • ASSEMBLER converts program into MACHINE CODE (object code file) • LINKER links OBJECT CODE modules into EXECUTABLE • LOADER loads EXECUTABLE code into memory to be run • Advanced issues modify simplified model: • Dynamic linking/loading • Virtual memory

  7. FETCH EXECUTE Program Execution Basics(von-Neumann Architecture) • Computer executes a PROGRAM stored • in MEMORY. • Basic scheme is - DO FOREVER: • FETCH an instruction (from memory). • EXECUTE the instruction. • This is the FETCH-EXECUTE cycle. • More complicated in REAL machines (e.g. • interrupts).

  8. MEMORY Block Diagram of a Computer CENTRAL PROCESSING UNIT (CPU) INPUT-OUTPUT (I/O)

  9. BYTE BYTE BYTE BYTE 32 BIT WORD WORD HALF WORD 2 WORDS BYTE BYTE BYTE BYTE BYTE Data Representation Basics • Bit - the basic unit of information: • (true/false) or (1/0) • Byte - a sequence of (usually) 8 bits • Word - a sequence of bits addressed as a SINGLE ENTITY by the computer • (in various computers: 1, 4, 8, 9, 16, 32, • 36, 60, or 64 bits per word) • Instruction?

  10. CENTRAL PROCESSING UNIT (CPU) CONTROL MEMORY 32 ADDRESS / / DATA 32 INPUT-OUTPUT (I/O) DEVICE DEVICE Refined Block Diagram

  11. CTRL RD,WR MEMORY DATA IN/OUT / ADDR / W K Address Space • Address Space • Physical (meaningful) addresses WORD 2n-1 ADDR. SPACE WORD 2K -1 PHYSICAL MEMORY ! WORD 0

  12. Data path • Contains: registers, program counter, • ALU, and address/data interconnections • or BUSes.

  13. Registers (Accumulators) • Basic operations: WRITE and READ. Important properties: WIDTH (in bits) • and ACCESS TIME. • Sometimes - other operations possible • (e.g. shift, compare, increment, mask). • Most CPUs have 1 to 32 registers. CNTRL REG 2k-1 ADDR 1 OUT 1 REGISTER FILE . . . ADDR 2 OUT 2 ADDR 3 IN REG 0

  14. Flags • Each FLAG represents a BIT of • important information: • MACHINE STATUS (error, interrupt, mode) • COMPUTATION STATUS (carry, overflow, zero, sign) • Usually also ``packed'' into a special ``register''

  15. 1 0 1 0 0 1 1 0 0 0 1 0 Arithmetic Logic Unit (ALU) • Performs actual computations: • Arithmetic (add, subtract, multiply, negate) • Logical (bitwise or, and, invert) • Example: bitwise and OPERAND 1 / W W OUT / OPERAND 2 / W OPERATION SELECT (CONTROL)

  16. Instruction Sequencing • Instructions usually fetched from • consecutive memory locations. • Use ``incrementer'' to advance PC • Except for JUMP, CALL, or INTERRUPT. PC TO BUS INTERFACE MUX +m

  17. BIU 32 Data Data Interface To the Prefetch Unit To the Cache Address Interface MMU 32 Address System Bus Control Interface To the CU Control Internal Bus Microprocessor Bus Interface

  18. Control • Generates control/timing signals • Selects OPERATIONS performed in: • ALU - select function • Register file - which to read, where to write • Program counter - advance or jump? • Bus control: memory address from where? Read or write? • Interrupts

  19. V t Performance • Timing is based on a CLOCK CYCLE or FREQUENCY (e.g. 800MHz). • Every action takes 1 or more clock cycles. • Main memory access usually more than 1 cycle - memory ACCESS TIME is critical! • EXECUTION contains several steps - may require MEMORY ACCESS. • Performance depends heavily on: • How many instructions to execute program or function? • How many cycles per instruction? • Thus, PERFORMANCE ENHANCEMENTS: instruction prefetch, cache, pipelining, etc.

  20. Programming in Assembly Language • ASSEMBLY LANGUAGE is (almost) 1 • to 1 with MACHINE CODE • Assembly language constructs are: • Symbolic version of machine instructions • Labels (standing for constants and memory addresses) • Pseudo-operations • ASSEMBLER converts program to • object file in 2 passes: • Pass I: translate symbolic instructions into binary code, create SYMBOL TABLE of labels. • Pass II: translate labels into (relocatable) addresses, fix binary code, and create object file with relocation information.

More Related