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Semiconductor Technology and Application 吳振銘 台積電六廠製程整合部經理 2010/03/24

Semiconductor Technology and Application 吳振銘 台積電六廠製程整合部經理 2010/03/24. Semiconductor Brings Fun to Your Life - History, Application and Market What is Transistor How is IC Fabricated - Process Modules - IC Process Flow - Technology Evolution

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Semiconductor Technology and Application 吳振銘 台積電六廠製程整合部經理 2010/03/24

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  1. Semiconductor Technology and Application 吳振銘 台積電六廠製程整合部經理 2010/03/24

  2. Semiconductor Brings Fun to Your Life - History, Application and Market • What is Transistor • How is IC Fabricated - Process Modules - IC Process Flow - Technology Evolution • What the Semiconductor Fabs Care - Yield improvement - PFA methodology - Defect Engineering - Reliability • A Day’s Work in tsmc

  3. Semiconductor Brings Fun to Your Life - History, Application and Market • What is Transistor • How is IC Fabricated - Process Modules - IC Process Flow - Technology Evolution • What the Semiconductor Fabs Care - Yield improvement - PFA methodology - Defect Engineering - Reliability • A Day’s Work in tsmc

  4. Biggest Semiconductor Players

  5. Semiconductor Brings Fun to Your Life - History, Application and Market • What is Transistor • How is IC Fabricated - Process Modules - IC Process Flow - Technology Evolution • What the Semiconductor Fabs Care - Yield improvement - PFA methodology - Defect Engineering - Reliability • A Day’s Work in tsmc

  6. 4 Types of Etch • Wet etch • Physical dry etch • Chemical dry etch • Chemical + Physical

  7. Technology Evolution

  8. 00 ITRS 130 01 ITRS 90 65 05 ITRS Technology Generation (nm) TSMC 45 32 ‘00 ‘02 ‘04 ‘06 ‘08 ‘10 ‘12 ITRS: International Technology Roadmap for Semiconductors

  9. Semiconductor Brings Fun to Your Life - History, Application and Market • What is Transistor • How is IC Fabricated - Process Modules - IC Process Flow - Technology Evolution • What the Semiconductor Fabs Care - Yield improvement - PFA methodology - Defect Engineering - Reliability • A Day’s Work in tsmc

  10. Imperfect Fabrication Process • Mask making dust, focusing • Growing oxide warping in furnace, uneven reactions • Resist over exposure, not hardened enough • Etching overetch of resist and/or oxide • Lateral diffusion affects transistor channel lengths • Multiple layers mask alignment • Packaging bonding wires to pins of package

  11. Yield Improvement • Defect reduction • Process window characterization • Process weakness • Sweet spot • Hardware control / PM / Lifetime • Design improvement • Innovation

  12. Manufacturing

  13. Process Integration Engineer Wafer In-Process • Technology readiness • New technology development • New product & experiment • Process parameters/SPEC setting • Product and Process qualification • Quality Guarantee • PCM (Process Control Monitor) • Cpk improvement • Defect inspection and reduction • Cp/FT yield improvement • Customer satisfaction • Customer satisfaction index • Engineering notice and lot handling Process Related and Modules FEOL BEOL Multilevel Interconnect STI, Salicide Contact/ Via, Metal Passivation Alignment mark Photo Etch Thin Film Diffusion Ion Implantation CMP Clean Q-time, Rework, KLA Process control CD, overlay, thickness Device/ Product characteristic WAT & QC outgoing inspection Customer satisfaction

  14. How We Work on Fast Time-to-Market Business Engagement Development • RD/Fab Joint Technology Meetings (Yield, Defect, Major issues..) • Joint Task Forces for Critical Modules • Enlarge Manufacturing Window • Joint Effort for Defect Reduction • Customized request • MKT/RD/Fab Joint discussion • New Tech/tool selection • Fab’s Super Highway Service Qualification Ramp Up • Joint Review for Process Frozen • Process/Product Qualification • Process Characterization • Process Control Review • Manufacturing Readiness • One Ramp Team: RD and Fab • 1st Si Success of Customer NTOs • Continuous Yield Improvement • Capacity Build-up and Release

  15. Semiconductor Brings Fun to Your Life - History, Application and Market • What is Transistor • How is IC Fabricated - Process Modules - IC Process Flow - Technology Evolution • What the Semiconductor Fabs Care - Yield improvement - PFA methodology - Defect Engineering - Reliability • A Day’s Work in tsmc

  16. Starting/Ending on Daily Hand over Goal 休息 上班時間 完成交接 下午交接 完成交接 下班時間 12:00 08:30 ~09:00 19:30 17:00 17:30 0810 Urgent case handling Daily work 長官關心

  17. TSMC Job Function

  18. EKM & Suggestion Hand over meeting Cost reduction Trouble shooting Hand over meeting EN & LH execution Technique Board Yield improvement SPC improvement Customer response X-Dept meeting Line excursion Production meeting FCCB Hold lots handling Daily Trend chart New project & CIT customer meeting One Vital Day in Fab - Engineer’s Daily Life - PIE MFG PE/EE

  19. The TSMC Value Proposition: Our Trinity of Strengths 客戶的成功 先進技術 卓越製造 客戶夥伴關係 • 專業晶圓製造模式 • 全面性解決方案 • 客戶服務導向提供最大整體利益 • 長期、雙贏、信賴 • 先進技術 • 主流製程 • 產能領導者 • 立即性與彈性 • 最佳的良率與生產週期 • 快速量產 產能與財務優勢

  20. 台積公司改變世界半導體業遊戲規則 封裝, 測試 封裝, 測試 專業的晶圓製造與服務，改變半導體業專業垂直分工的商業模式 IP 供應商 System/IC Design System/IC Design System Design / IC Design System/IC Design System/IC Design 設計服務 晶圓製造 (Fab) 晶圓 製造 (Fab) 晶圓 製造 (Fab) 晶圓製造 (Foundry) 晶圓製造 台積電 台積電 封裝, 測試 封裝, 測試 封裝, 測試 Before 1986 1990s After 2000

  21. 系統 產品 設計 光罩 晶圓測試 總測試 台積公司價值鏈 客戶 核心能力 智財權(IP)/資料庫(Library) 電子設計自動化(EDA) 設計服務 設計執行 台積公司 核心能力 技術 製造 錫鉛凸塊(Bumping) 後端服務 覆晶(Flip Chip)

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