'Sleep transistor' presentation slideshows

Distributed Sleep Transistor Network for Power Reduction*

Distributed Sleep Transistor Network for Power Reduction*. Changbo Long ECE Department, UW-Madison clong@cae.wisc.edu Lei He EDA Research Group EE Department, UCLA lhe@ee.ucla.edu. *Partially sponsored by NSF CAREER Award 0093273, SRC grant HJ-1008 and Intel Corporation. Outline.

406 views • 28 slides

Post-Layout Leakage Power Minimization Based on Distributed Sleep Transistor Insertion

317 views • 18 slides

Subthreshold SRAM Designs for Cryptography Security Computations

264 views • 14 slides