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Lecture 13 VHDL Structural Modeling

Lecture 13 VHDL Structural Modeling. Hai Zhou ECE 303 Advanced Digital Design Spring 2002. Outline. Structural VHDL Use of hierarchy Component instantiation statements Concurrent statements Test Benches READING: Dewey 12.1, 12.2, 12.3, 12.4, 13.1, 13.2, 13.3. 13.4, 13.6, 13.7. 13.8.

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Lecture 13 VHDL Structural Modeling