'Complement addition' presentation slideshows

ELEC 5200-001/6200-001 Computer Architecture and Design Fall 2008 Symbol Representation and Floating Point Numbers (Chap

ELEC 5200-001/6200-001 Computer Architecture and Design Fall 2008 Symbol Representation and Floating Point Numbers (Chapters 2 and 3). Vishwani D. Agrawal James J. Danaher Professor Department of Electrical and Computer Engineering Auburn University, Auburn, AL 36849

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Branch Addressing

Branch Addressing. beq $s1, $s2, Label if ($s1 = =$s2) go to Label. op rs rt address. 17. 18. 4. address. 6 bits 5 bits 5 bits 16 bits. effective 32 bit address = ( PC + 4 ) + ( address * 4 ).

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Subtraction

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ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN

ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN. Lecture 8 Dr. Shi Dept. of Electrical and Computer Engineering. SIGNED NUMBERS. 0 0001100 2 = 12 10. 1 0001100 2 = -12 10. Sign bit. Sign bit. Magnitude. Magnitude. How To Represent Signed Numbers.

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Computer SCIENCE

274 views • 13 slides