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CS61CL Machine Structures Lec 6 – Number Representation. David Culler Electrical Engineering and Computer Sciences University of California, Berkeley. Review: MIPS R3000. r0 r1 ° ° ° r31. 0. Programmable storage 2^32 x bytes 31 x 32bit GPRs (R0=0)
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David Culler
Electrical Engineering and Computer Sciences
University of California, Berkeley
r0
r1
°
°
°
r31
0
Programmable storage
2^32 x bytes
31 x 32bit GPRs (R0=0)
32 x 32bit FP regs (paired DP)
HI, LO, PC
Data types ?
Format ?
Addressing Modes?
PC
lo
hi
32bit instructions on word boundary
cs61cl f09 lec 6
funct
6
op
6
rs
5
rt
5
rd
5
shamt
5
R: RegReg
op
6
rs
5
rt
5
immediate
16
I: RegImed
op
6
immediate
26
J: Jump
cs61cl f09 lec 6
cs61cl f09 lec 6
+15
+0
Example: 3 + 2 = 5
+1
+14
1111
0000
1110
0001
Unsigned binary addition
Is just addition, base 2
Add the bits in each position and carry
+13
+2
1101
0010
+12
+3
1100
0011
+11
1011
+4
0100
1
0 0 1 1
+ 0 0 1 0
0 1 0 1
1010
0101
+10
+5
1001
0110
+6
+9
1000
0111
+7
+8
cs61cl f09 lec 6
Which one did you learn in 2nd grade?
cs61cl f09 lec 6
 +

+
1
+15
+0
2
+1
+14
1111
0000
1110
0001
3
+13
+2
1101
0010
4
+12
+3
1100
0011
+11
5
1011
+4
0100
1010
6
0101
+10
+5
1001
0110
+6
7
+9
1000
0111
+7
+8
8
What algebraic mapping would have this assignment?
cs61cl f09 lec 6
0*27 + B626+ B525+ B424 + B323 + B222 + B121+ B020
Positive Number
0xxxxxxx
000000000xxxxxxx
0*215 + … + 0*27 + B626+ B525+ B424 + B323 + B222 + B121+ B020
Negative Number
27 + B626+ B525+ B424 + B323 + B222 + B121+ B020
1xxxxxxx
111111111xxxxxxx
215 + 214 … + 27 + B626+ B525+ B424 + B323 + B222 + B121+ B020
27
cs61cl f09 lec 6
funct
6
op
6
rs
5
rt
5
rd
5
shamt
5
R: RegReg
op
6
rs
5
rt
5
immediate
16
I: RegImed
op
6
Addr
26
J: Jump
cs61cl f09 lec 6
funct
6
op
6
rs
5
rt
5
rd
5
shamt
5
R: RegReg
op
6
rs
5
rt
5
immediate
16
I: RegImed
op
6
Addr
26
J: Jump
cs61cl f09 lec 6
+15
+0
+1
+14
1111
0000
1110
0001
+13
+2
1101
0010
+12
+3
1100
0011
+11
1011
+4
0100
1010
0101
+10
+5
1001
0110
+6
+9
1000
0111
+7
+8
cs61cl f09 lec 6
+15
+0
+1
+14
1111
0000
1110
0001
+13
+2
1101
0010
+12
+3
1100
0011
+11
1011
+4
0100
1010
0101
+10
+5
1001
0110
+6
+9
1000
0111
+7
+8
cs61cl f09 lec 6
cs61cl f09 lec 6
cs61cl f09 lec 6
cs61cl f09 lec 6
+0
+1
6
1111
0000
1110
0001
5
+2
+
1101
0010
4
+3
1100
0011
0 100 = + 4
3
1011
+4
1 100 =  4
0100
1010
0101
2
+5

1001
0110
+6
1
1000
0111
+7
0
Sign and MagnitudeExample: N = 4
High order bit is sign: 0 = positive (or zero), 1 = negative
Remaining low order bits is the magnitude: 0 (000) thru 7 (111)
Number range for n bits = +/ 2n1  1
Representations for 0?
Operations: =, <, >, +,  ???
cs61cl f09 lec 6
2 10000
1  00001
1111
7  0111
1000
Ones ComplementBit manipulation:
simply complement each of the bits
0111 > 1000
Algebraically …
N is positive number, then N is its negative 1\'s complement
N = (2n  1)  N
Example: 1\'s complement of 7
7 in 1\'s comp.
cs61cl f09 lec 6
Subtraction implemented by addition & 1\'s complement
Sign is easy to determine
Closure under negation. If A can be represented, so can A
Still two representations of 0!
If A = B then is A – B == 0 ?
Addition is almost clockwise advance, like unsigned
cs61cl f09 lec 6
Easy to determine sign (0?)
Only one representation for 0
Addition and subtraction just as in unsigned case
Simple comparison: A < B iff A – B < 0
One more negative number than positive number
 one number has no additive inverse
cs61cl f09 lec 6
N* = 2n  N
4
2 = 10000
7 = 0111
1001 = repr. of 7
sub
Example: Twos complement of 7
4
2 = 10000
7 = 1001
0111 = repr. of 7
Example: Twos complement of 7
sub
Bit manipulation:
Twos complement: take bitwise complement and add one
0111 > 1000 + 1 > 1001 (representation of 7)
1001 > 0110 + 1 > 0111 (representation of 7)
cs61cl f09 lec 6
cs61cl f09 lec 6
4
+ 3
7
0100
0011
0111
Perform unsigned addition and
Discard the carry out.
Overflow?
4
+ (3)
7
1100
1101
11001
4
 3
1
0100
1101
10001
4
+ 3
1
1100
0011
1111
Simpler addition scheme makes twos complement the most common
choice for integer number systems within digital systems
cs61cl f09 lec 6
Operand have same sign: unsigned addition of magnitudes
4
+ 3
7
0100
0011
0111
4
+ (3)
7
1100
1011
1111
result sign bit is the
same as the operands\'
sign
Operands have different signs:
subtract smaller from larger and keep sign of the larger
4
 3
1
0100
1011
0001
4
+ 3
1
1100
0011
1001
cs61cl f09 lec 6
Perform unsigned addition, then add in the endaround carry
4
+ 3
7
0100
0011
0111
4
+ (3)
7
1011
1100
10111
1
1000
End around carry
4
 3
1
0100
1100
10000
1
0001
4
+ 3
1
1011
0011
1110
End around carry
cs61cl f09 lec 6
M + N when N > M:
n
n
M* + N = (2  M) + N = 2 + (N  M)
n
Ignoring carryout is just like subtracting 2
M + N where N + M ≤ 2n1
n
n
M + (N) = M* + N* = (2  M) + (2  N)
= 2  (M + N) + 2
n
n
After ignoring the carry, this is just the right twos compl.
representation for (M + N)!
cs61cl f09 lec 6
How can you tell an overflow occurred?
Add two positive numbers to get a negative number
or two negative numbers to get a positive number
1
1
+0
+0
2
2
1111
0000
+1
1111
0000
+1
1110
1110
0001
0001
3
3
+2
+2
1101
1101
0010
0010
4
4
1100
+3
1100
+3
0011
0011
5
5
1011
1011
0100
+4
0100
+4
1010
1010
6
6
0101
0101
+5
+5
1001
1001
0110
0110
7
7
+6
+6
1000
0111
1000
0111
8
8
+7
+7
7  2 = +7!
5 + 3 = 8!
cs61cl f09 lec 6
0 1 1 1
0 1 0 1
0 0 1 1
1 0 0 0
1 0 0 0
1 0 0 1
1 1 0 0
1 0 1 1 1
5
3
8
7
2
7
Overflow
Overflow
0 0 0 0
0 1 0 1
0 0 1 0
0 1 1 1
1 1 1 1
1 1 0 1
1 0 1 1
1 1 0 0 0
5
2
7
3
5
8
No overflow
No overflow
Overflow occurs when carry in to sign does not equal carry out
cs61cl f09 lec 6