Next linear collider test accelerator and epics
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Next Linear Collider Test Accelerator and EPICS. PSI Epics Meeting May, 2001 S. Allison, R. Chestnut, M. Clausen, K. Luchini. Current NLCTA Controls. Originally an EPICS target Mixture of SLC, Labview, Veetest Slow (1/2 Hertz control) Two structures with two klystrons each

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Next Linear Collider Test Accelerator and EPICS

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Next linear collider test accelerator and epics

Next Linear Collider Test Accelerator and EPICS

PSI Epics Meeting

May, 2001

S. Allison, R. Chestnut, M. Clausen, K. Luchini


Current nlcta controls

Current NLCTA Controls

  • Originally an EPICS target

  • Mixture of SLC, Labview, VeetestSlow (1/2 Hertz control)

  • Two structures with two klystrons each

  • “Process” structures to show feasibility/durability for NLC

  • Desire to run without operators present


What s the big deal

What’s the big deal?

  • Structures are critical for NLC design

  • Results are pivotal for the NLC cotillion at Snowmass

  • Current intense involvement by a diagnostics group SWAT team

  • Current intense scrutiny by management


Next linear collider test accelerator and epics

NLCTA RF Processing Layout

Drive 1

Sled

Klys

Out

RE1

FE1

Drive 2

RE2

FE2

Load2

Load1

These measurement points correspond to thevariables mentioned in the briefing. These are in Joules, and are the integral over the RF pulse.


The move to epics

The move to EPICS

  • Slow IOC (MV177)

    • Alan Bradley

    • VSAM

  • Fast IOC (MVME 2700)

    • ADC signals

    • TDC signals

    • DAC control

    • Digital I/O


Slow ioc

Slow IOC

  • Alan Bradley interface to move from Veetest to Epics

  • Prying details from PLC programmers

  • Lots of signals – the devil is in the details

  • Work well under way, with many details remaining


Fast ioc

Fast IOC

  • 60 (or 120 Hz) operation

  • New (for us) integrating ADC, TDC, DAC and digital I/O support

  • New (for us) Power PC

  • Requirements specify pulse by pulse monitor and control of structure processing


Fast ioc hardware

Fast IOC Hardware

  • MVME 2700 Power PC

  • Caen V265 Gated ADC (3)

  • Lecroy 1176 TDC

  • VMIC 2534 32-bit Digital I/O

  • VMIC 4100 12-bit D/A

  • Joerger VTR812 12-bit digitizer (later)


Fast ioc fast loop

Fast IOC fast loop

  • Read in 20 ADC signals and 6 TDC signals

  • Perform limit checks on various power measurements

  • Disable on one felony OR two parole violations in quick succession

  • Provide ring buffers for off-line analysis

  • All of the above synchronized on each pulse


Fast adc and piop records

Fast ADC and “PIOP” records

  • One ADC interrupts; other records fired by events; whole fast loop is one lockset.

  • One “ADC” record for each module

  • Quadratic conversion per channel

  • Circular buffers built in


Fast adc record

Fast ADC Record

120 Hz

8 HW Inputs

Per Channel:

Signal in Joules

N-sec circ. buffer

FE1

Load1

……

8x3 conversion coefficients


Next linear collider test accelerator and epics

Fast ADC and “PIOP” records

  • One “PIOP” record per structure – not 1-to-1 with ADC records.

  • “PIOP” record has 20 or so db links to hard-coded PVs.

  • One ADC and one PIOP at 60 Hz take 6% of the MV177

  • Seems to take about .0016 seconds per loop.


Piop subroutine record

“PIOP” subroutine record

120 Hz

Functioning:

Calculate NORM, LOST

Check for warning/error

Drive GO/NOGO digital output

Inputs:

9( or maybe12) converted

ADC signals + limits


Fast ioc asynchronous fast code

Fast IOC asynchronous fast code

  • Implement re-enabling strategies for different failure modes

  • Watch vacuums and other relevant data

  • Can also trip off on vacuum

  • All of the above fast, but asynchronous to the pulse-by-pulse flow


Next milestones

Next Milestones

  • May 7 – have local testing done; ready to move equipment down to NLCTA.

  • May 15 – next run starts; be ready to run parasitically

  • June 29 – Current structures at end of life; Snowmass; cut over to Epics as primary system.


The other 20

The other 20%

  • Displays (many)

  • Infrastructure (save/restore, archiver, configs, CUDs, StripTool, SIP, SCP support, alarm logging)

  • Testing – modules, drivers, and fast, synchronous software

  • Matlab support (offline event analysis)


The really big deal

The really big deal

  • Data storage for archiving(Network layout, computer center role, etc.)

  • Faster machines (additional load!)

  • NLCTA could keep a fast Sun busy AND fill any space we can give them.


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