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Systemc TLM-2.0

Systemc TLM-2.0. What is TLM ?. In short, TLM is communication using function calls (as it is shown in the picture ). 在 SystemC 上增加总线功能“库”. How is TLM brought up?. Transaction Level Modeling ( TLM ) is motivated by a number of practical problems. These include :

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Systemc TLM-2.0

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  1. Systemc TLM-2.0

  2. What is TLM ? • In short, TLM is communication using function calls (as it is shown in the picture ). • 在SystemC上增加总线功能“库”

  3. How is TLM brought up? Transaction Level Modeling ( TLM ) is motivated by a number of practical problems. These include : • Providing an early platform for software development • System Level Design Exploration and Verification • The need to use System Level Models in Block Level Verification.

  4. OSCI TLM Development

  5. TLM-1.0 Core concept: TLM API (应用程序接口): • Support design & verification IP reuse • Usability • Safety • Speed • Generality • Abstraction Levels • HW / SW • Different communication architectures (bus, packet,...) • Different protocols

  6. What is SystemC TLM2.0 ? • TLM1.0 lacks of model interoperability, where different vendors create models to be used by a common customer; it is up to the TLM2.0 to interface the components so they talk to each other. • The main objective for the TLM 2.0 standard is to solve these problems of model interoperability while defining a solid API and suggested data structures that, when used as proposed, enable model interoperability. • TLM2.0 is announced by OSCI and it delivers a truly viable standard for modelinteroperability and reuse of intellectual property.

  7. TLM-1.0  TLM-2.0 • TLM-2.0 is the new standard for interoperability between memory mapped bus models • TLM-1.0 is not deprecated (put, get, nb_put, nb_get, transport) • TLM-1.0 is included within TLM-2.0

  8. Why is TLM-2.0 so important? • It provides an essential framework needed for model exchange within companies and across the IP supply chain by explicitly addressing virtual prototyping. • The standard enables optimal reuse of models and modeling effort across different use cases.

  9. Content of OSCI TLM-2.0 • Interfaces for Loosely-Timed (LT) Modeling 没有时钟概念的模型接口 • Interfaces for Approximately-Timed (AT) Modeling 时钟近似的模型接口 • Generic Payload for Memory-Mapped Buses 基于存储空间分配的总线建模 • Direct Memory Interface (DMI) 存储空间直接访问 • Debug Transaction Interface 调试接口

  10. Content of OSCI TLM-2.0

  11. Content of OSCI TLM-2.0 Use Cases • Software development • Software performance • Architectural analysis • Hardware verification

  12. Content of OSCI TLM-2.0 Coding Styles, Abstractions • Loosely-timed • Approximately-timed

  13. Mechanisms Blocking interface and Non-blocking interface • In SystemC, there are two basic kinds of processes: SC_THREAD and SC_METHOD. The key difference between the two is that it is possible to suspend an SC_THREAD by calling wait(.). SC_METHODs on the other hand can only be synchronized by making them sensitive to an externally defined sc_event. • OSCI TerminologyContains wait(.)Can be called from Blocking Possibly SC_THREAD only Non Blocking NoSC_METHOD or SC_THREAD

  14. Mechanisms DMI (Direct Memory Interface) • Gives an initiator a direct pointer to memory in a target, e.g an ISS • By-passes the sockets and transport calls • Read or write access by default • Extensions may permit other kinds of access, e.g. security mode • Target responsible for invalidating pointer

  15. Mechanisms Sockets: an interface that can encapsulation other interface • Group the transport, DMI and debug transport interfaces • Bind forward and backward paths with a single call • Strong connection checking • Have a bus width parameter

  16. Mechanisms Generic payload • Typical attributes of memory-mapped busses • command, address, data, byte enables, single word transfers, burst transfers, streaming, response status • Off-the-shelf general purpose payload • for abstract bus modeling • ignorable extensions allow full interoperability • Used to model specific bus protocols • mandatory static extensions • compile-time type checking to avoid incompatibility • low implementation cost when bridging protocols

  17. Mechanisms • Extensions: it is used for flexibility of modeling. • Quantum: itis user-configurable which can speed up the performance • Phases: transaction Phases which is used in Approximately-timed model and the Base protocol phases is BEGIN_REQ  END_REQ  BEGIN_RESP  END_RESP.

  18. Content of OSCI TLM-2.0 Mechanisms (Loosely-timed) • Blocking interface • DMI (Direct Memory Interface) • Quantum • Sockets • Generic payload • Extensions

  19. Content of OSCI TLM-2.0 Mechanisms (Approximately-timed) • Sockets • Generic payload • Extensions • Phases • Non-blocking

  20. TLM-2 Core Interfaces - Transport tlm_blocking_transport_if void b_transport( TRANS& , sc_time& ) ; tlm_fw_nonblocking_transport_if tlm_sync_enumnb_transport_fw( TRANS& , PHASE& , sc_time& ); tlm_bw_nonblocking_transport_if tlm_sync_enumnb_transport_bw( TRANS& , PHASE& , sc_time& );

  21. TLM-2 Core Interfaces - DMI and Debug tlm_fw_direct_mem_if boolget_direct_mem_ptr( TRANS& trans , tlm_dmi& dmi_data ) ; tlm_bw_direct_mem_if void invalidate_direct_mem_ptr( sc_dt::uint64 start_range, sc_dt::uint64 end_range ) ; tlm_transport_dbg_if unsigned inttransport_dbg( TRANS& trans ) ;

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