ENGR 2720 Chapter 10. State Machine Design. State Machine Definitions. State Machine: A synchronous sequential circuit consisting of a sequential logic section and a combinational logic section.
State Machine Design
Mealy Machine: An FSM whose outputs are determined by both the sequential logic and combinational logic of the FSM
2. Draw a State Diagram
3. Make a State Table
since output Q follows input D. The D inputs are the same as next state outputs.
5. Simply the Boolean expression for each synchronous input
6. Draw the logic circuit for the state machine
(State Name/Value), such as Start/0.
it then transitions to State = Continue and out1 = 1, out2 = 0.