A 10 6mw 0 8pj power scalable 1gs s 4b adc in 0 18 m cmos with 5 8ghz erbw
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A 10.6mW/0.8pJ Power-Scalable 1GS/s 4b ADC in 0.18µm CMOS with 5.8GHz ERBW PowerPoint PPT Presentation


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Potential applications Ultra-Wide Band radio-receivers Wireless Personal Area Networks, Wireless Body Area Networks,… Energy-constrained portable devices Multi-rate reconfigurable systems Challenges High speed and large signal bandwidth Low power Power/performance configurability

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A 10.6mW/0.8pJ Power-Scalable 1GS/s 4b ADC in 0.18µm CMOS with 5.8GHz ERBW

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A 10 6mw 0 8pj power scalable 1gs s 4b adc in 0 18 m cmos with 5 8ghz erbw

Potential applications

Ultra-Wide Bandradio-receivers

Wireless Personal Area Networks,

Wireless Body Area Networks,…

Energy-constrained portable devices

Multi-rate reconfigurable systems

Challenges

High speedandlarge signal bandwidth

Low power

Power/performance configurability

Exploit dynamic structures

Our approach

ImproveFlash ADC architecture

UNIVERSITÀ

DI PISA

A 10.6mW/0.8pJ Power-Scalable 1GS/s 4b ADCin 0.18µm CMOS with 5.8GHz ERBW


The proposed flash adc architecture

The proposed flash ADC architecture

  • Adoptdynamic comparators with built-in thresholds

    • Power scales linearly with sample rate

  • Remove unessential power-hungry blocks

    • Preamplifiers

    • (low) resistive ladder for reference generation

  • Digital calibration

    • enable trip-point tuning

    • mitigate device mismatch


Performance summary

Performance summary

  • Power scaling with fsample: 500MS/s  5.2mW (0.73pJ)

    VDD=1.7V, 200MS/s  2mW (0.67pJ)


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