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Online ALCT in CLCT match window

Online ALCT in CLCT match window. If you wanted a CLCT match window width of 3bx, the value of the ALCT to be centered in the CLCT match window should end up in bin 1 Setting match_trig_alct_delay = 7 gives: ALCT in CLCT match window[0] = 0 ALCT in CLCT match window[1] = 0

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Online ALCT in CLCT match window

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  1. Online ALCT in CLCT match window • If you wanted a CLCT match window width of 3bx, the value of the ALCT • to be centered in the CLCT match window should end up in bin 1 • Setting match_trig_alct_delay = 7 gives: • ALCT in CLCT match window[0] = 0 • ALCT in CLCT match window[1] = 0 • ALCT in CLCT match window[2] = 0 • ALCT in CLCT match window[3] = 0 • ALCT in CLCT match window[4] = 12 • ALCT in CLCT match window[5] = 72 • ALCT in CLCT match window[6] = 16 • ALCT in CLCT match window[7] = 0 • ALCT in CLCT match window[8] = 0 • ALCT in CLCT match window[9] = 0 • ALCT in CLCT match window[10] = 0 • ALCT in CLCT match window[11] = 0 • ALCT in CLCT match window[12] = 0 • ALCT in CLCT match window[13] = 0 • ALCT in CLCT match window[14] = 0 • ALCT in CLCT match window[15] = 0 • ALCT in CLCT match window average = 5.04 • The amount to shift the distribution by is 4.04 (= 4) • Best alct_match_window_delay = 3 Based on the current settings in the xml file: mpc_tx_delay = 3 and alct_match_window_delay = 4 • Best mpc_tx_delay = 4 Should use current set value for width, instead of setting this value…  Also, 10% value probably not good enough to compare with cable lengths… Need more reads…

  2. Tried B-Go commands • SP did not respond correctly to Resync, BC0… • TMB was resetting counters on “EC0” command… • Not even in the CCB manual… • Something may be messed up in translation from LTC  TTCci  CCB

  3. Next ideas for plans for slice test • BGo commands on one chamber • SP has new firmware… can try Thursday? • New TMB firmware: Layer trigger • Measure how much CLCT pattern shifts relative to ALCT • Maximize rate with CLCT layer/ALCT pretrigger-pattern parameters • Push CLCT pretrigger layer threshold down to 2. Map out phase space over following parameters... • comparator delay until signal peak: comp_delay • delay in bx between pretrigger and triggers for ALCT and CLCTs: alct_drift_delay and clct_drift_delay. • strip bit persistence: triad_persist. • Timing with pulsing (will move up in list when I have system…)

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