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managed by Brookhaven Science Associates for the U.S. Department of Energy. Instrumentation Division Microelectronics. · ASIC Developments at BNL · Front-end ASIC for Micro-pattern Detectors. Gianluigi De Geronimo. Summary. Microelectronics for radiation detectors state-of-the-art

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managed by Brookhaven Science Associates

for the U.S. Department of Energy

Instrumentation Division

Microelectronics

· ASIC Developments at BNL

· Front-end ASIC for Micro-pattern Detectors

Gianluigi De Geronimo


Summary

  • Microelectronics for radiation detectors

    • state-of-the-art

    • design flow and fabrication

  • Some recent ASIC examples

  • The peak detector circuit

  • Front-end ASIC for Micromegas


  • year 2000

    · 500 nm technology

    · 16,000 transistors

    · 16 channels

    · analog

    year 2009

    · 130 nm technology

    · > 1M transistors

    · > 100 channels

    · analog and digital

    (mixed-signal)

    14 mm

    64-ch. ASIC for Neutron Detectors

    State-of-the-Art

    Typical front-end electronics channel

    sensing element

    buffering derandomization

    minor DSP

    sparsification

    ADC

    multiplexing

    discrimination amplitude

    timing

    filtering

    (shaping)

    stabilization

    intensive DSP

    low-noise

    charge amplifier

    Application

    Specific

    Integrated

    Circuits

    (in BNL since early ’90)


    Subcircuits

    • Low-noise, low-power charge amplifiers

      • gas, liquid, solid state detectors

      • capacitances from 10-14 to 10-8 F

    • Switched and continuous adaptive reset

    • High-order filters, stabilizers, drivers

      • peak time / gain adjustment

    • Single- and multi-level discriminators

    • Peak and time detectors, derandomizers

    • Analog memories and multiplexers

    • Counters and digital memories

    • Configuration registers

    • ESD protections

    • Calibration pulse generators

    • Analog-to-digital converters

    • Digital-to-analog converters

    • Precision band-gap references

    • Temperature sensors

    • Readout control logic

    • Low-voltage differential signaling

    • Current-mode analog and digital interface

    ASIC for 3D CZT 3D CZT

    Position Sensitive Detectors

    · 128 channels

    · 2 mW/channel

    · 13 x 10 mm²

    · 300,000 transistors

    · CMOS 250 nm

    Functionality and complexity increase by the years


    system level

    design

    transistor

    level

    design

    design

    phase

    masks

    layout

    fabrication

    tests

    months

    ~ 2

    ~ 6

    ~ 2

    ~ 3

    ~ 2

    ASIC Design Flow

    revision cycle

    Fromconcept to ready-for-production:

    1 - 2 cycles, 2 - 3 years, 3-6 FTE (depending on complexity)

    Higher functionality and complexity means more resources and expertise , higher risk, longer development time


    BNL ASIC is here

    (20 mm², ~ 60,000 transistors)

    ideal for prototyping and low volume

    ASIC Fabrication : Prototyping

    Major foundries accept designs from multiple customers (MPW)

    20 mm reticle

    multi-project wafer

    MPW

    200 mm diameter


    ASIC Fabrication : Production

    Major foundries accept purchase of dedicated run

    4-10 chips in a ~20x20 mm2 reticle

    ~ 55 reticles per wafer

    < 1$ / channel


    Examples of Main Stream Technologies

    Year

    nm

    40

    45

    65

    90

    130

    180

    250

    350

    TSMC

    Technology node

    • 2010 MPW fabrication schedule

      • from MOSIS Service (mosis.org)

    2009

    0.9V

    2008

    2006

    1V

    2002

    2000

    1.2V

    • All of these are main stream

      • available at MPW services

      • used for prototyping

    • Technologies with highest run schedule are expected to last 10 more years at minimum(non-MPW in very last few years).

    1.8V

    1999

    HV

    1998

    2.5V

    1995

    3.3V

    HV

    • Typical applications

    • CMOS ≥130nm: <GHz analog, mixed-signal

    • CMOS <130nm: >GHz analog, digital

    • SiGe (HBT): >>GHz analog

    • SOI: >>GHz analog, high-density digital

    • HV: >>high-voltage (>30V)

    IBM

    nm

    32

    45

    65

    90

    130

    180

    250

    350

    2010

    0.9V

    SOI

    SOI

    1V

    1.2V

    SiGe

    1.8V

    HV

    Complexity increases,

    voltage decreases, ...

    SiGe

    2.5V

    SiGe

    1995

    3.3V



    ASIC for Laser Electron Gamma Source TPC

    Gas Electron Multiplier (GEM)

    8000 anode pads read out in < 400 µs

    due to unique sparse readout

    • 32 channels - mixed signal

    • low-noise charge amplification

    • energy and timing, 230 e-, 2.5 ns resol.

    • neighbor processing

    • multiplexed and sparse readout

    • 40,000 transistors

    • adopted by CERN for MicroMegas characterization

    3.1 x 3.6 mm²

    G. De Geronimo et al., IeeeTNS 51 (2004)


    neutrons

    ASIC for 3He Gas Detector

    3He detector for small angle neutron scattering experiments at SNS

    • Low-noise front-end withunity gas-gain

    • Single-pad induction (small-pixel effect)

    • 3He pressure for max 3-pad charge sharing

    • Full size: 196 x 196 pixel array (108 n/s)

    • Pixel 25 mm², 5 pF, rate 5 kHz / pixel

    • 64 channels - mixed signal

    • low-noise charge amp.

    • peak detector, 6-bit ADC

    • 18-bit timestamp

    • 110 e- resol., 1.5 mW/ch.

    • sparse readout and FIFO

    • 300,000 transistors

    1.8% on

    neutron peak

    window

    6.6 x 8.5 mm²

    image from Cd foil on

    48 x 48 pad array

    G. De Geronimo et al., IeeeTNS 54 (2007), collaboration with ORNL


    ASIC for High-Resolution X-ray Spectroscopy

    • Collaboration with NASA at XRS for elemental mapping

    • Based on Silicon Drift Pixels

    • 16 channels - mixed signal

    • very low noise amplification

    • 11 electrons resolution

    • 1.2 mW/channel

    • peak detection, sparse readout

    • pile-up rejection, temperature sensor

    • 30,000 transistors

    ~11 e- resolution (93 eV)

    on 20 mm² SD pixels

    G. De Geronimo et al., IeeeTNS 55 (2008), collaboration with NASA


    ASIC for High-rate Photon Counting Applications

    • 64 channels - mixed signal

    • fast shaper (40ns, 9th order)

    • five energy windows per channel

    • 16-bit counter & memory per window

    • mega-counts s-1 per channel

    • 600,000 transistors

    • used in industrial and medical applications

    Proxiscan

    6.6 x 6.6 mm²

    ~ 10µ x 10µ

    G. De Geronimo et al., IeeeTNS 54 (2007), collaboration with eV Microelectronics


    LAr TPC ASIC ( Long-Baseline Neutrino Experiment )

    • 16 channels

    • charge amplifier, high-order filter

    • adjustable gain: 4.7, 7.8, 14, 25 mV/fC (55, 100, 180, 300 fC)

    • adjustable filter time constant (peaking time): 0.5, 1, 2, 3 µs

    • selectable collection/non-collection mode (baseline)

    • selectable dc/ac (100µs) coupling

    • rail-to-rail signal analog signal processing

    • band-gap referenced biasing

    • temperature sensor (~ 3mV/°C)

    • 136 registers with digital interface

    • 5.5 mW/channel (input MOSFET 3.9 mW)

    • single MOSFET test structures

    • ~ 15,000 MOSFETs

    • designed for operation in cryogenic environment > 20 years

    • technology CMOS 0.18 µm, 1.8 V, 6M, MIM, SBRES

    First analog prototype developed 08/2009-07/2010

    Digital section (ADC, FIFO, ...) being developed


    LAr TPC ASIC ( Long-Baseline Neutrino Experiment )

    Bandgap Reference

    variation ≈ 1.8 %

    Temperature Sensor

    ~ 2.86 mV / °K

    Pole-zero cancellation at 77K

    to be addressed in next revision

    Adjustable gain, peaking time and baseline

    maximum charge 55, 100, 180, 300 fC



    Peak Detector - Classical Configuration

    • detects and holds peak without external trigger

    • provides accurate timing signal (peak found, z-cross on derivative)

    • low accuracy (op-amp offset, CMRR)

    • poor drive capability


    Peak Detector - Timing

    p ≈ 3.5, p ≈ 1.5



    Peak Detector - Multiphase

    1 - Track (< threshold)

    • Analog output is tracked at hold capacitor

    • MP and MN are both enabled

    2 - Peak-Detect (> threshold)

    • Pulse is tracked and peak is held

    • Only MP is enabled

    • Comparator is used for peak-found

    3 - Read (at peak-found)

    • Amplifier re-configured as buffer

    • High drive capability

    • Amplifier offsets is canceled

    • Enables rail-to-rail operation

    • Accurate timing

    • Some pile-up rejection


    Peak Detector - Multiphase

    chip 1 – negative offset

    chip 2 – positive offset


    Peak Detector vs MCA

    MCA

    PD

    MCA, PD





    VMM1 ASIC: Architecture

    • 64 channels

    • adj. polarity, adj. maximum charge (0.11 to 2 pC), adj. peaktime (25-200 ns)

    • derandomizing peak detection (10-bit) and time detection (1.5 ns)

    • real-time event peak trigger and address

    • integrated threshold with trimming, sub-threshold neighbor acquisition

    • integrated pulse generator and calibration circuits

    • analog monitor, channel mask, temperature sensor

    • continuous measurement and readout, derandomizing FIFO

    • few mW per channel, chip-to-chip (neighbor) communication, LVDS interface


    VMM1 ASIC: Schedule and Status

    Analog section:

    transistor-level simulations

    power ≈ 4 mW

    Charge Resolution

    5k

    Qmax = 330 fC

    Pulse Response

    1.2

    Qin = 300 fC

    peaktime 25ns

    ENC (e-)

    Amplitude [V]

    50ns

    100ns

    200ns

    0

    0

    150

    time [ns]

    0

    0

    200

    CIN [pF]


    ENC vs Power (input MOSFET) at 10 pF

    10 pF, 130nmCMOS

    peaktime

    25 ns

    ENC

    50 ns

    100 ns

    Power (input MOSFET)


    Conclusions

    • We design of state-of-the art, low-power, low-noise, mixed-signal integrated circuits (> 30 ASICs in last 10 years)

    • Our ASIC design process is defined and predictable, characterized by high yield and high reliability

    • Mixed-signal integrated circuits and interfaces are compatible with low-noise front-ends



    About our Microelectronics Group

    We have an established worldwide reputation in

    state-of-the-art low-noise ASIC design

    • In the past 10 years we have developed more than 30 ASICs (~30 FTE effort) for applications in:

      • Nuclear and Particle Physics

      • Light Sources

      • National Security

      • Medical and Industrial Imaging

      • Astrophysics

    Our ASICs support research programs of interest

    to all five BNL Science Directorates


    Recent ASIC Projects

    • STAR: CMOS front-end for silicon vertex tracker

    • PHENIX: Front-end and flash ADC for time expansion chamber

    • ATLAS: Cathode strip chamber, LAr calorimeter upgrade (SiGe), Muon Micromegas (CMOS)

    • SLAC: Scattering experiments at Linac Coherent Light Source

    • SNS:3He detector for small angle neutron scattering experiments

    • LEGS: GEM TPC for laser electron gamma source experiments

    • NSLS: Si detectors EXAFS and powder diffraction experiments

    • NSLS & AUSTR. SYNCH.: High-rate, high-resolution micro-spectroscopy

    • NSLS & NJIT: High-rate, high-resolution x-ray spectroscopy and holography

    • NSLS &SLAC: High-voltage matrix switching ASIC

    • NRL: Compton imager (DHS), x-ray navigation system (NASA)

    • NASA: SDD-based XRS for elemental mapping in space missions

    • MEDICAL and SECURITY: Micro-PET for RatCAP, PET-MRI, and wrist scanner, CZT-based

    • PET, 3D position sensitive detector (UM, DoD, DHS), co-planar grid detector (LANL, DoD),

    • portable gamma camera, prostate cancer imager (Hybridyne), eye-plaque dosimeter (CMRP)

    • CRADAs: eV Microelectronics (CZT), Digirad (Medical), CFDRC (MAPS), Photon Imaging (Si)

    • Symbol Technologies (Wireless), Analogic, RMD

      - Our patented sub-circuits (>10) are licensed to industries -

    • Our group generates more than six publications per year in peer-reviewed journals

    • We teach a Course in Microelectronics for Radiation Sensorsfor graduates at SUNY SB


    Examples of Commercial Applications

    Bone Densitometer (GE Lunar)

    eZ Scope Compact Gamma Camera (NucleMed)

    Solid State Gamma Imagers (Digirad)

    Proxiscan (Hybridyne)

    (in development)


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