Fyp project presentaton
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FYP PROJECT PRESENTATON PowerPoint PPT Presentation


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FYP PROJECT PRESENTATON. Alan Concannon 4ECE Supervisor: Dr Fearghal Morghan Co-Supervisor:John Maher. Presentation Overview. Project Description/Specification Current Progress Future Work. Project Specification(Original).

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FYP PROJECT PRESENTATON

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Fyp project presentaton

FYP PROJECT PRESENTATON

Alan Concannon

4ECE

Supervisor: Dr Fearghal Morghan

Co-Supervisor:John Maher


Presentation overview

Presentation Overview

Project Description/Specification

Current Progress

Future Work


Project specification original

Project Specification(Original)

Perform further development on an existing Digilent Spartan-3 FPGA based application

Perform a range of DSP, image and data processing functions.


Project specification updated

Project Specification(Updated)

Export an existing Spartan 3 FPGA based application onto the Digilent Nexys Board

Implement extra DSP functionality

e.g. An FIR Filter


System overview

System Overview


Existing hardware

Existing Hardware


New hardware nexys

New Hardware - Nexys


Graphical user interface

Graphical User Interface


Current work progress

Current Work/Progress

appliedVHDL course completed

Reviewed Shane Agnew’s FYP

Reviewed Antoin O’hAllmhurain’s FYP

Downloaded counter program to Nexys board to prove functionality

Nexys Board ready for CSR access

Started implementing Nexys memory module in VHDL


Future work

Future Work

Implement new RAM BFM and Memory controller

Implement current project with Nexys board – Completely functional

Design an FIR filter in VHDL and Implement in the Project


Questions

Questions?


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