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Chapter 2

Chapter 2. B. V. alues represented. Sign and. b. b. b. b. magnitude. 1'. s complement. 2'. s complement. 3. 2. 1. 0. +. 7. +. 7. +. 7. 0. 1. 1. 1. +. 6. +. 6. +. 6. 0. 1. 1. 0. +. 5. +. 5. +. 5. 0. 1. 0. 1. +. 4. +. 4. +. 4. 0. 1. 0. 0. +.

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Chapter 2

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  1. Chapter 2

  2. B V alues represented Sign and b b b b magnitude 1' s complement 2' s complement 3 2 1 0 + 7 + 7 + 7 0 1 1 1 + 6 + 6 + 6 0 1 1 0 + 5 + 5 + 5 0 1 0 1 + 4 + 4 + 4 0 1 0 0 + 3 + 3 + 3 0 0 1 1 + 2 + 2 + 2 0 0 1 0 + 1 + 1 + 1 0 0 0 1 + 0 + 0 + 0 0 0 0 0 - 0 - 7 - 8 1 0 0 0 - 1 - 6 - 7 1 0 0 1 - 2 - 5 - 6 1 0 1 0 - 3 - 4 - 5 1 0 1 1 - 4 - 3 - 4 1 1 0 0 - 5 - 2 - 3 1 1 0 1 - 6 - 1 - 2 1 1 1 0 - 7 - 0 - 1 1 1 1 1 Figure 2.1. Binary, signed-integer representations.

  3. n bits first word second word • • • i th word • • • last word Figure 2.5. Memory words.

  4. 32 bits • • • b b b b 31 30 1 0 for positive numbers Sign bit: b = 0 31 for negative numbers b = 1 31 (a) A signed integer 8 bits 8 bits 8 bits 8 bits ASCII ASCII ASCII ASCII character character character character (b) Four characters Figure 2.6.Examples of encoded information in a 32-bit word.

  5. W ord address Byte address Byte address 0 0 1 2 3 0 3 2 1 0 4 4 5 6 7 4 7 6 5 4 • • • • • • k k k k k k k k k k 2 - 4 2 - 4 2 - 3 2 - 2 2 - 1 2 - 4 2 - 1 2 - 2 2 - 3 2 - 4 (a) Big-endian assignment (b) Little-endian assignment Figure 2.7. Byte and word addressing.

  6. Register Transfer Notation [ ] means “content of” [R2] means “content of register R2” [A] means “content of memory location A” means “transfer content” R1 [R2] means “transfer content of register R2 to register R1”

  7. Register Transfer Notation R1 [LOC] Transfer the content of memory location LOC to register R1 R3 [R1] + [R2] Sum the contents of registers R1 and R2 and transfer the result to R3

  8. Assembly Language Notation • MOVE LOC, R1 • ADD R1, R2 • SUB R1, R2, R3 • Mnemonic op codes • Symbolic addresses

  9. Contents Address Move A, R0 i Begin execution here 3-instruction i + 4 program B, R0 Add segment i + 8 Move R0, C • • • A • • • Data for B the program • • • C Figure 2.8. A program for C ¬ [A] + [B].

  10. Move NUM1,R0 i i + 4 Add NUM2,R0 n-1 ADD instructions i + 8 Add NUM3,R0 • • • i Add NUM n ,R0 + 4 n - 4 i 4 n + Move R0,SUM • • • SUM NUM1 NUM2 • • • NUM n Figure 2.9. A straight-line program for addingn numbers.

  11. Move N,R1 Clear R0 LOOP Determine address of "Next" number and add N times Program "Next" number to R0 loop Decrement R1 Branch>0 LOOP Move R0,SUM • • • SUM N n NUM1 NUM2 • • • NUM n Figure 2.10. Using a loop to addn numbers.

  12. Table 2.1 Generic addressing modes Name Assembler syntax Addressing function Immediate #Value Operand = Value Register Ri EA = Ri Absolute (Direct) LOC EA = LOC Indirect (Ri) EA = [Ri ] (LOC) EA = [LOC] Index X(Ri) EA = [Ri ] + X Base with index (Ri,R j) EA = [Ri ] + [R j ] Base with index X(Ri,R j) EA = [Ri ] + [R j ] + X and offset Relative X(PC) EA = [PC] + X Autoincrement (Ri )+ EA = [Ri ]; Increment Ri Autodecrement −(Ri ) Decrement Ri ; EA = [Ri ] EA = effective address Value = a signed number

  13. Immediate Addressing • Operand is part of the instruction • Operand is in the address field • Example: ADD 17 – Add 17 to the contents of the accumulator – 17 is the operand

  14. Instruction word: OP CODE OPERAND ADD 17 • No memory reference to fetch the data • • Fast • • Limited range of values

  15. Direct Addressing (Register) OP CODE Address Registers R0 R1 R2 R3 R4 R5 INC R4 Operand

  16. Direct Addressing (Absolute) OP CODE Address Memory ADD LOC Operand

  17. Add (R1), R0 Add (A), R0 Main memory B Operand A B Register Operand R1 B B (a) Through a general-purpose register (b) Through a memory location Figure 2.11. Indirect addressing.

  18. Address Contents Move N,R1 Initialization Move #NUM1, R2 Clear R0 LOOP Add (R2), R0 Add #4, R2 Decrement R1 LOOP Branch > 0 Move R0,SUM Add N numbers starting with NUM1 Figure 2.12. Use of indirect addressing in the program of Figure 2.10.

  19. Add 20(R1),R2 R1 1000 1000 20 = offset 1020 Operand (a) Offset is given as a constant Add 1000(R1),R2 1000 20 R1 20 = offset 1020 Operand (b) Offset is in the index register Figure 2.13. Indexed addressing. see next

  20. Add 20(R1), R2 R1 1000 base address 1000 20 = offset Operand 1020 index: 0,4,8,16,20,etc. (a) Offset is given as a constant Figure 2.13. Indexed addressing.

  21. Add 1000(R1), R2 R1 20 1000 index: 0,4,8,16,20,etc. 20 = offset Operand 1020 base address (a) Offset is in the register Figure 2.13. Indexed addressing.

  22. n N Student ID LIST LIST + 4 Test 1 Student 1 LIST + 8 Test 2 LIST + 12 Test 3 LIST + 16 Student ID Test 1 Student 2 Test 2 Test 3 • • • Figure 2.14. A list of students' grades.

  23. ;base of array Move #LIST, R0 ;accumulator for T1 Clear R1 ;accumulator for T2 Clear R2 ;accumulator for T3 Clear R3 ;number of students Move N,R4 ;first test score Add 4(R0), R1 LOOP ;second Add 8(R0), R2 ;third Add 12(R0), R3 ;next student Add #16, R0 ;decrement count Decrement R4 Branch > 0 LOOP Move R1, SUM1 R2, SUM2 Move Move R3, SUM3 Figure 2.15. Indexed addressing used in accessing test scores in the list in Figure 2.14.

  24. Move N, R1 Initialization Move #NUM1, R2 Clear R0 LOOP Add (R2)+, R0 Decrement R1 Branch>0 LOOP Move R0,SUM Add N numbers starting with NUM1 Figure 2.16. The Autoincrement addressing mode used in the program of Figure 2.12.

  25. 100 Move N,R1 104 Move #NUM1,R2 108 Clear R0 LOOP 112 Add (R2),R0 the program 116 Add #4,R2 120 Decrement R1 124 Branch>0 LOOP 128 Move R0,SUM 132 accumulator for sum SUM 200 length of list N 204 100 NUM1 208 the list (array) of numbers NUM2 212 NUM n 604 Figure 2.17. Memory arrangement for the program in Figure 2.12.

  26. Table 2.1 Generic addressing modes Name Assembler syntax Addressing function Immediate #Value Operand = Value Register Ri EA = Ri Absolute (Direct) LOC EA = LOC Indirect (Ri) EA = [Ri ] (LOC) EA = [LOC] Index X(Ri) EA = [Ri ] + X Base with index (Ri,R j) EA = [Ri ] + [R j ] Base with index X(Ri,R j) EA = [Ri ] + [R j ] + X and offset Relative X(PC) EA = [PC] + X Autoincrement (Ri )+ EA = [Ri ]; Increment Ri Autodecrement −(Ri ) Decrement Ri ; EA = [Ri ] EA = effective address Value = a signed number

  27. Memory Addressing address or data lab el Op eration information SUM EQU 200 ORIGIN 204 assembler directives N D A T A W ORD 100 NUM1 RESER VE 400 ORIGIN 100 ST AR T MO VE N,R1 MO VE #NUM1, R2 CLR R0 statements that generate machine instructions LOOP ADD (R2), R0 ADD #4, R2 DEC R1 BGTZ LOOP MO VE R0, SUM RETURN assembler directives END ST AR T Figure 2.18. Assembly language representation for the program in Figure 2.17.

  28. The Assembler(first pass) Read the AL program file, processing the directives and locating all of the labels Assign addresses to instructions and data Build a symbol table containing all of the names (labels) and their corresponding values (addresses)

  29. Symbol table for the example: SUM 200 from the EQU directive N 204 from the ORIGIN directive NUM1 208 counting from ORIGIN START 100 from 2nd ORIGIN LOOP 112 counting from ORIGIN

  30. The Assembler(second pass) Read the AL program file again Replace all mnemonic op codes with their binary code values Replace all symbolic addresses (labels) with their numeric value Generate a code file with the machine language program

  31. Bus Processor DATAIN DATOUT SIN SOUT Keyboard Display Figure 2.19 Bus connection for processor, keyboard, and display

  32. Bus Processor DATAIN DATOUT SIN SOUT Keyboard Display flags buffers Figure 2.19 Bus connection for processor, keyboard, and display

  33. Bus Processor DATAIN SIN Keyboard keystroke puts character in DATAIN, sets flag SIN to 1 to indicate to processor that character can be read Program: READWAIT Branch to READWAIT if SIN = 0 ;wait for keystroke Input content of DATAIN to R1

  34. Bus Processor DATOUT SOUT Display display sets flag SOUT to 1 to indicate to processor that it is ready to receive a character Program: WRITEWAIT Branch to WRITEWAIT if SOUT = 0 ;wait for display Output content of R1 to DATAOUT

  35. READWAIT Branch to READWAIT if SIN = 0 Input content of DATAIN to R1 WRITEWAIT Branch to WRITEWAIT if SOUT = 0 Output content of R1 to DATAOUT “busy wait” What the CPU Must Do

  36. READWAIT Testbit #3, INSTATUS Branch=0 READWAIT MoveByte DATAIN, R1 WRITEWAIT Testbit #3, OUTSTATUS Branch=0 WRITEWAIT MoveByte R1, DATAOUT device status registers Assembler Language Instructions

  37. Move #LOC, R0 Initialize pointer to register R0 to point to the address of the first location in memory where the characters are to be stored READ TestBit #3, INSTATUS Wait for a character to be entered in the Branch=0 READ keyboard buffer DATAIN MoveByte DATAIN, (R0) Transfer the character from DATAIN into the memory (this clears SIN to 0) ECHO TestBit #3, OUTSTATUS Wait for the display to become ready Branch=0 ECHO MoveByte (R0), DATAOUT Move the character just read to the display buffer register (this clears SOUT to 0) Compare #CR, (R0)+ Check if the character just read is CR (carriage return). If it is not CR, then Branch= READ branch back and read another character and also increment the pointer to store the next character Figure 2.20. A program that reads a line of characters and displays it.

  38. Calling program • Move N, R1 R1 serves as a counter. • Move #NUM1, R2 R2 points to the list. • Call LISTADD Call subroutine. • Move R0, SUM Save result. • . • . • . • Subroutine • LISTADD Clear R0 Initialize sum to 0. • LOOP Add (R2)+, R0 Add entry from list. • Decrement R1 • Branch>0 LOOP • Return Return to calling program. Figure 2.25 Program of Figure 2.16 written as a subroutine; parameters passed through registers.

  39. Assume top of stack is at level 1 below. • Move #NUM1,−(SP) Push parameters onto stack. • Move N,−(SP) • Call LISTADD Call subroutine • (top of stack at level 2). • Move 4(SP),SUM Save result. • Add #8,SP Restore top of stack • (top of stack at level 1). • . • . • . • LISTADD MoveMultiple R0−R2,−(SP) Save registers • (top of stack at level 3). • Move 16(SP),R1 Initialize counter to n. • Move 20(SP),R2 Initialize pointer to the list. • Clear R0 Initialize sum to 0. • LOOP Add (R2)+,R0 Add entry from list. • Decrement R1 • Branch>0 LOOP • Move R0,20(SP) Put result on the stack. • MoveMultiple (SP)+,R0−R2 Restore registers. • Return Return to calling program. Figure 2.26. Program of Figure 2.16 written as a subroutine; parameters passed on the stack.

  40. Memory • location Instructions Comments • Main program • . • . • . • 2000 Move PARAM2, −(SP) Place parameters on stack. • 2004 Move PARAM1, −(SP) • 2008 Call SUB1 • 2012 Move (SP), RESULT Store result. • 2016 Add #8, SP Restore stack level. • 2020 next instruction • . • . • . • First subroutine • 2100 SUB1 Move FP, −(SP) Save frame pointer register. • 2104 Move SP,FP Load the frame pointer. • 2108 MoveMultiple R0−R3,−(SP) Save registers. • 2112 Move 8(FP), R0 Get first parameter. • Move 12(FP), R1 Get second parameter. • . • . • . • Move PARAM3, −(SP) Place a parameter on stack. • 2160 Call SUB2 • 2164 Move (SP)+, R2 Pop SUB2 result into R2. • . • . • . • Move R3, 8(FP) Place answer on stack. • MoveMultiple (SP)+, R0−R3 Restore registers. • Move (SP)+, FP Restore frame pointer register. • Return Return to Main program. • Second subroutine • 3000 SUB2 Move FP,−(SP) Save frame pointer register. • Move SP,FP Load the frame pointer. • MoveMultiple R0−R1,−(SP) Save registers R0 and R1. • Move 8(FP),R0 Get the parameter. • . • . • . • Move R1,8(FP) Place SUB2 result on stack. • MoveMultiple (SP)+,R0−R1 Restore registers R0 and R1. • Move (SP)+,FP Restore frame pointer register. • Return Return to Subroutine 1. Figure 2.28 Nested subroutines.

  41. Memory • location Instructions Comments • Main program • . • . • . • 2000 Move PARAM2, −(SP) Place parameters on stack. • 2004 Move PARAM1, −(SP) • 2008 Call SUB1 • 2012 Move (SP), RESULT Store result. • 2016 Add #8, SP Restore stack level. • 2020 next instruction • . • . • . Figure 2.28 Nested subroutines.

  42. Memory • location Instructions Comments • First subroutine • 2100 SUB1 Move FP, −(SP) Save frame pointer register. • 2104 Move SP,FP Load the frame pointer. • 2108 MoveMultiple R0−R3, −(SP) Save registers. • 2112 Move 8(FP), R0 Get first parameter. • Move 12(FP), R1 Get second parameter. • . • . • . • Move PARAM3, −(SP) Place a parameter on stack. • 2160 Call SUB2 • 2164 Move (SP)+, R2 Pop SUB2 result into R2. • . • . • . • Move R3, 8(FP) Place answer on stack. • MoveMultiple (SP)+, R0−R3 Restore registers. • Move (SP)+, FP Restore frame pointer register. • Return Return to Main program. Figure 2.28 Nested subroutines.

  43. Memory • location Instructions Comments • Second subroutine • 3000 SUB2 Move FP,−(SP) Save frame pointer register. • Move SP,FP Load the frame pointer. • MoveMultiple R0−R1,−(SP) Save registers R0 and R1. • Move 8(FP),R0 Get the parameter. • . • . • . • Move R1,8(FP) Place SUB2 result on stack. • MoveMultiple (SP)+,R0−R1 Restore registers R0 and R1. • Move (SP)+,FP Restore frame pointer register. • Return Return to Subroutine 1. Figure 2.28 Nested subroutines.

  44. [R1] from SUB1 Stack [R0] from SUB1 frame [FP] from SUB1 FP for second 2164 subroutine param3 [R3] from Main [R2] from Main [R1] from Main Stack frame [R0] from Main for FP [FP] from Main first subroutine 2012 param1 param2 Old TOS Figure 2.29. Stack frames for Figure 2.28.

  45. carry flag fill with zeros Figure 2.30. Logical shift instructions.

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