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ELEC1700 Computer Engineering 1 Week 7 Monday lecture Decoders, encoders and multiplexers

ELEC1700 Computer Engineering 1 Week 7 Monday lecture Decoders, encoders and multiplexers Semester 1, 2013. Decoders Encoders Multiplexers. Decoders, encoders and multiplexers. A 0. A 0. X. X. A 1. A 1. A 2. A 2. A 3. A 3. active-HIGH decoder for 0011.

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ELEC1700 Computer Engineering 1 Week 7 Monday lecture Decoders, encoders and multiplexers

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  1. ELEC1700Computer Engineering 1Week 7 Monday lectureDecoders, encoders and multiplexers Semester 1, 2013

  2. Decoders Encoders Multiplexers Decoders, encoders and multiplexers

  3. A0 A0 X X A1 A1 A2 A2 A3 A3 active-HIGH decoder for 0011 active-LOW decoder for 0011 Decoders • Decoder detects the presence of specific combinations of bits (code) at its input • Indicates presence of code by asserting outputs: active-HIGH or active-LOW Example: two simple decoders that detect the presence of the binary code 0011 (LSB) (MSB)

  4. 1 1 0 1 A simple decoder 1 What binary number does this decoder detect? Boolean expression for the decoder output? Active-LOW or active-HIGH output?

  5. binary number detected 3-to-8 decoder inputs 3-to-8 decoder Each output corresponds to a minterm • General decoders have n inputs and 2n outputs • Precisely one output asserted for each unique bit pattern • 3-to-8 decoder here (n=3) also known as: 3-line-to-8-line decoder, or 1-of-8 decoder, or 3:8 decoder

  6. 3-to-8 decoder in Logisim Week07Mon.circ – demo01

  7. 4-to-16 decoder 1 1 1 1 1 1 1 Inputs 1 1 Outputs 1 1 0 1 1 1 0 1 1 1 1 Decoders with active-LOW outputs • Active-LOW outputs are indicated by “bubbles” on decoder outputs What are the decoder outputs for the inputs shown?

  8. Decoders with enable input inputs outputs E=0 E=1 2-to-4 decoder E (enable) E A1 A0 D0 D1 D2 D3 ----------------------------------------------- 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 1 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 1 1 0 0 0 1 • Enable input is like an on/off switch for the decoder: • E=1: decoder functions “normally” → one output asserted • E=0: no outputs asserted

  9. 74x138 3-to-8 decoder • to enable chip, needG1=1and G2A=G2B=0 • active LOW outputs Ref: http://bit.ly/HW7Dvk http://bit.ly/HKUGak

  10. 74x138 3-to-8 decoder truth table If I were to ask an exam/quiz question which used the 74x138 3-to-8 decoder, I would use a table like this!

  11. Logisim simulation of 74x138 Week07Mon.circ – demo02

  12. Decoder application #1 • Input/output (I/O) devices exchange data with microprocessor via a shared data bus • At most one I/O device uses data bus at any one time • Each I/O device has: • unique “address” A3A2A1A0 • active-LOW enable input (EN) • A3A2A1A0 inputs to 4-to-16 decoder • Sixteen possible 4-bit I/O port addresses • 0000,0001,…,1111 • ports 0–6 (decimal) used here • ports 7–15 (decimal) unused More details when we consider microprocessors in week 12

  13. 3-to-8 decoder Decoder application #2 • Recall: each decoder output corresponds to a minterm • To produce a sum of minterms expression, simply OR together the relevant decoder outputs!

  14. Decoder application #2 • Example: Full-adder adds three bits: A, B and carry-in (Cin) • Result is sum (S) and carry-out (Cout) A B Cin Cout S ------------------------------------------- 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1

  15. Decoder-based implementation of full-adder Decoder outputs 1,2,4,7 Decoder outputs 3,5,6,7 Week07Mon.circ – demo03

  16. Decoders Encoders Multiplexers Decoders, encoders and multiplexers

  17. 16-to-4 encoder outputs Encoders inputs 16-to-4 encoder shown here In general: 2n-to-n encoder • Encoders perform “reverse” of decoder function • Assume only one input is asserted, then output is binary code for that input • Example: if D7 is the only HIGH input, then A3A2A1A0 = 0111 • In general: input Dk asserted → output is binary equivalent of decimal k

  18. Encoder application: keypad encoding Binary code representing key pressed 16-to-4 encoder Keypad input • What should an encoder do if multiple inputs are active? • One answer: make the device a priority encoder • respond to the highest-priority input that is active, and ignore any lower priority inputs

  19. 74x148 : priority encoder • Active-LOW inputs 0,1,2,…,7 • 7: highest priority • 0: lowest priority • Coded output A2A1A0 • highest asserted input is • Active-LOW enable input EI • GS and EO outputs not important here • See p314 text for details

  20. 74x148 : priority encoder Week07Mon.circ – demo05

  21. Decoders Encoders Multiplexers Decoders, encoders and multiplexers

  22. Multiplexers A multiplexer (MUX) routes data from one of the data inputs D0, D1, D2, D3 to the output Y Select inputs S1 and S0 determine which data input is chosen 4-to-1 MUX shown here – MUXes with more inputs are possible (and common)

  23. Multiplexer – timing diagram

  24. D0 Y D1 4-to-1 MUX D2 D3 S1 S0 Multiplexer (MUX) Data input selected by S1S0 is directed to output Y S1S0= 00 : Y = D0 S1S0 = 01 : Y = D1 S1S0 = 10 : Y = D2 S1S0 = 11 : Y = D3

  25. 74x151 : 8-to-1 MUX Week07Mon.circ – demo06

  26. D0 D1 D2 Y 8-to-1 MUX D3 D4 S0 D5 S1 D6 S2 D7 MUX application #1 Use an 8-to-1 MUX to implement the Boolean function in the truth table below A2 A1 A0 Y -------------------------- 0 0 0 0 D0 0 0 1 1 D1 0 1 0 0 D2 0 1 1 1 D3 1 0 0 0 D4 1 0 1 1 D5 1 1 0 1 D6 1 1 1 0 D7 A2A1A0 When A2A1A0 = 000, Y = D0 → set D0 = 0 When A2A1A0 = 001, Y = D1 → set D1 = 1

  27. MUX application #1 • Data inputs tied LOW (= logic-0) • 0,2,4,7 • Data inputs tied HIGH (= logic-1) • 1,3,5,6 Compare with truth table on previous page

  28. MUX application #2 • Time-division multiplexing (TDM) • Multiple bit-streams share access to channel by “taking turns” • Sub-channel #1 in time slot 1, sub-channel #2 in time slot 2, … High-speed channel data rate = 8×64 = 512 kbits/s Data input rate on each “sub-channel” is 64kbits/s TDM also used by second-generation (2G) mobile phones (GSM) to share access to radio spectrum

  29. Data input D0 D1 1-to-4 DEMUX D2 D3 S1 S0 Demultiplexer (DEMUX) Data input is directed to the output line selected by S1S0 S1S0= 00 : data input to D0 S1S0 = 01 : data input to D1 S1S0 = 10 : data input to D2 S1S0 = 11 : data input to D3 Non-selected output lines have LOW levels

  30. Demultiplexer – timing diagram

  31. DEMUX = decoder with enable D=0 D=1 2-to-4 decoder E (enable) D S1 S0 D0 D1 D2 D3 ----------------------------------------------- 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 1 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 1 1 0 0 0 1 D0 D D1 1-to-4 DEMUX D2 D3 S1 S0 Truth table for decoder with enable on slide 8

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