Cadence Front to Back End Adil Sarwar

Cadence Front to Back EndAdil Sarwar March 2004

Presentation Overview • Tool Setup • Virtuoso Schematic Editor (Composer) for design entry • Analog Design Environment (Analog Artist) for netlisting and simulation. • Virtuoso LE for layout • Diva for physical Verification • Mixed-signal simulations / AMS Designer

Tool Setup • Source new cshrc file , IC 5.0 installed • Icfb –W -> to check the version of tool • cds.lib -> file in directory from where you want to run the tool • .cdsinit and .env files for initialization and bindkeys • icms , layoutPlus and icfb

Cadence Flow Diagram Parasitic re-simulation Affirma Spectre Analog Simulator Virtuoso Schematic Editor back annotation Diva schematics Virtuoso XL Virtuoso Custom Router DRC LVS LPE Virtuoso Layout Editor Physical Design Physical Verification Stream PCell Libraries and technology files Rules files, technology files GDSII

CIW Window

Library Manager

Creating Directories and cds.lib file

Creating Schematic Cell

Inverter Schematic

CDF Parameters

Adding Pins and Wire names

Virtuoso – Cell Creation and LSW

Virtuoso layout

Inverter Layout

Giving Terminal Names

Diva DRC

DRC Results in CIW Window

LVS Setup

LVS Results

Model and Libraries • Models from NCSU Kit or From Mosis site • analogLib library was used for voltage sources and gnd • basic library was used for pins • dfII database and environment was used

Tutorials and Useful sites • Tutorials available in Cadence Setup • Go to install directory, the tutorials should be here • <install_dir>/tools/dfII/samples/tutorials • cp –r cell_design ~/ • http://www.owlnet.rice.edu/~elec522/w9/virtuoso_layout/ • http://www.ee.princeton.edu/~cadence/usr/ • NCSU site for tarred kit

Cadence Front to Back End Adil Sarwar