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EECE 320 Digital Systems Design Lecture 4: Combinational Logic Design Principles

EECE 320 Digital Systems Design Lecture 4: Combinational Logic Design Principles. Ali Chehab. Duality Principle. Any theorem or identity in switching algebra remains true if the following is done: (0 and 1) are swapped ( . and +) are swapped

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EECE 320 Digital Systems Design Lecture 4: Combinational Logic Design Principles

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  1. EECE 320Digital Systems DesignLecture 4: Combinational Logic Design Principles Ali Chehab

  2. Duality Principle • Any theorem or identity in switching algebra remains true if the following is done: • (0 and 1) are swapped • (. and +) are swapped • The dual of a logic expression is the same expression with (. and +) swapped • FD(X1, X2, …, XN, +, ., ‘) = F(X1, X2, …, XN, ., +, ‘) • De Morgan’s Theorem • [F(X1, X2, …, XN)]’ = FD(X1’, X2’, …, XN‘)

  3. Standard Representation of Logic Functions • Truth Table • For an N-variable logic function, the truth table has 2N rows, and 1 output column. • Practical for small values of N • EX: 3-variable function

  4. Standard Representation of Logic Functions • Definitions • Literal: variable or its complement. EX: X, Y, Z’ • Product Term: Z’, X.Y, X.Y.Z’ • Sum-of-products expression: Z’ + X.Y + X.Y.Z’ • Sum term: Z’, (X+Y+W) • Product-of-sum expression: Z’.(X+Y).(X+Y+W’) • Normal Term: Product or sum where no variable appears more than once. EX: X.Y’.Z, X+Y+W • Non-normal Term: X.Y.Y.Z, X.X’.Z • N-variable Minterm: Normal product with n literals. There are 2N minterms. EX: N=3  X.Y.Z, X’.Y.Z • N-variable Maxterm: Normal sum with n literals. There are 2N maxterms. EX: N=4  X+Y+Z+W, X’+Y+Z’+W • A minterm (maxterm) is a product (sum) that is 1 (0) in exactly 1 row of the truth table

  5. Standard Representation of Logic Functions F 0 0 0 1 0 1 1 1 • Minterm i corresponds to row i. • Canonical sum of a logic function is a sum of the minterms where output = 1 (On-set). • EX: F = X,Y,Z(3,5,6,7) = X’Y.Z + X.Y’.Z + X.Y.Z’ + X.Y.Z • Canonical product is the product of maxterms where output = 0 (Off-set) • EX: F = X,Y,Z(0,1,2,4) = (X+Y+Z)(X+Y+Z’)(X+Y’+Z).(X’+Y+Z)

  6. Standard Representation of Logic Functions • Five possible representations of a combinational logic function • Truth table • Canonical sum, algebraic sum of minterms • Minterm list using  notation • Canonical product, algebraic product of maxterms • Maxterm list using  notation

  7. Standard Representation of Logic Functions • EX: Let F = A + B’.C. Express F in canonical form. • Solution: • F has 3 variables • Find truth table • Find minterms • F= SA,B,C(1,4,5,6,7)

  8. Combinational Circuit Analysis • Given a logic diagram, we can draw the truth table, which is the most primitive functional description, and then we can write a logic expression such as the canonical sum or product.

  9. Combinational Circuit Analysis • Given a logic diagram, we can draw the truth table, which is the most primitive functional description, and then we can write a logic expression such as the canonical sum or product.

  10. Combinational Circuit Analysis • Given a logic diagram, we can draw the truth table, which is the most primitive functional description, and then we can write a logic expression such as the canonical sum or product.

  11. Combinational Circuit Analysis • The second approach is to build a parenthesized logic expression of the circuit’s function. We start from the inputs and work our way to the output.

  12. Combinational Circuit Analysis • The second approach is to build a parenthesized logic expression of the circuit’s function. We start from the inputs and work our way to the output.

  13. Combinational Circuit Analysis • If we multiply out the expression of F, we obtain a new expression that translates to a new implementation. • F = ((X+Y’).Z) + X’.Y.Z’  F = X.Z + Y’.Z + X’.Y.Z’ • Sum-of-product expression that can be implemented as a two-level AND-OR circuit

  14. Combinational Circuit Analysis • If we add out the expression of F, we obtain a new expression that translates to a new implementation. • F = ((X+Y’).Z) + X’.Y.Z’  • F = (X+Y’+X’).(X+Y’+Y).(X+Y’+Z’).(Z+X’).(Z+Y).(Z+Z’) • F = (X+Y’+Z’).(Z+X’).(Z+Y) • Product-of sum expression that can be implemented as a two-level OR-AND circuit

  15. Next Lecture and Reminders • Next lecture • Reminders

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