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ESTREMO

ESTREMO. E nhancement of conductance in integrated power devices by means of st rain e ffect and mo dulation techniques. ERC (Europen Research Council) Starting Grant Research proposal Partecipanti

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ESTREMO

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  1. ESTREMO Enhancement of conductance in integrated power devices by means of strain effect and modulation techniques • ERC (Europen Research Council) Starting Grant Research proposal • Partecipanti • ARCES (Advanced Research Center on Electronic Systems), Facoltà di Ingegneria, Università di Bologna • CNR-IMM - Bologna • Texas Instruments, Inc., Dallas, Texas, USA

  2. ESTREMO • Com’è nato il consorzio • collaborazione fra ARCES e T.I. USA già esistente sullo studio di dispositivi per applicazioni Smart Power • limitazioni nella conduzione dei transistor DMOS • “… velocity saturation effects in the drift region limit the device conductance, leading to a detrimental reduction of the maximum current drive at high voltages and to a premature current saturation…” • Nel progetto si indagheranno due aspetti • strain engineering • conductance modulation

  3. ESTREMO • Comparison of the turn-on characteristic of the reference rugged LDMOS with that of a “strained” one. A 5-MPa tensile stress along the transport direction is applied under the STI region.

  4. ESTREMO • Coinvolgimento IMM • Misure di deformazione reticolare in silicio • CBED • LACBED • NBD (Nano Beam Diffraction) • Misure in strutture ‘grandi’ • condizioni più rilassate per la misura • possibilità di ottenere geometrie ‘ad hoc’ da T.I. • strain uniassiali • possibilità di sviluppo misure in campi di strain rapidamente variabile • È stata esplicitamente richiesta da ARCES la possibilità di inserire nel progetto una parte di sviluppo metodologico della misura di strain

  5. ESTREMO CBED LACBED NBD

  6. ESTREMO – descrizione del lavoro

  7. ESTREMO – WP1

  8. ESTREMO – WP2-WP3

  9. ESTREMO – Gantt chart e m/m

  10. ESTREMO - costs [1] Adapt to actual project duration.

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