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Magnetic Random Access Memory (MRAM)

Magnetic Random Access Memory (MRAM). Noah Flaks, Patti Viri, Jeremy Yim, Tara Zedayko Cornell University Materials Science and Engineering MS&E 407 11/02/2005. Contents. General electromagnetic concepts Competing Technologies Market History of MRAM Development

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Magnetic Random Access Memory (MRAM)

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  1. Magnetic Random Access Memory (MRAM) Noah Flaks, Patti Viri, Jeremy Yim, Tara Zedayko Cornell University Materials Science and Engineering MS&E 407 11/02/2005

  2. Contents • General electromagnetic concepts • Competing Technologies • Market • History of MRAM Development • What MRAM is and how it works • Challenges • Manufacturing / Fabrication • Major MRAM Competitors • References

  3. Magnetoresistance http://www.stoner.leeds.ac.uk/research/gmr.htm

  4. Ferromagnetism http://hyperphysics.phy-astr.gsu.edu/hbase/solids/hyst.html#c1

  5. DRAM • DYNAMIC random access memory • Slow • Needs to be refreshed, hence dynamic

  6. FRAM • Structurally similar to DRAM • Ferroelectric film made of PZT • Nonvolatile • Fast read/write times

  7. SRAM • STATIC random access memory • Faster, more reliable than DRAM • Need not be refreshed, hence static • Expensive, used in CPU cache

  8. Flash Memory • Non-volatile • NOR and NAND • Does not need to be refreshed

  9. Comparison of RAM Slaughter J.M et al; Fundamentals of MRAM Technology; Journal of Superconductivity; 15(1), 19; 2002

  10. The Market for MRAM • Technology as-is: Niche markets • Weapons, Defense • The near future: Portable Electronics • Speed • Data reliability • Low power • High-performance writes • Unlimited read-write endurance • Low write energy www.freescale.com

  11. A Brief History of MRAM:Cross-Tie Random Access Memory (CRAM) • 1982: Naval Surface Weapons Center • First technology to use a magnetic element for storage • Same element used for magnetoresistance (MR) readout • 81-19 Ni-Fe (Permalloy): 400 Å • Obstacles • Consistent writing • Low signal Schwee et al, J. Appl. Phys, 53(3), 1982, 2762.

  12. A Brief History of MRAM:Anisotropic Magnetoresistance (AMR) • Mid 1980’s: Honeywell • Writing using magnetic hysteresis • Reading using MR of the same body where the data is stored • Memory cells integrated on an IC chip • Cobalt-permalloy alloy • AMR 2% • Changes in electrical resistance as magnetization is altered • Thin films • magnetization can be single domain • Demagnetizing fields force magnetization direction to remain virtually parallel to the plane of the film. • Maximum resistance when magnetization and current are parallel Daughton, J. Magnetoresistive Random Access Memory, 2000

  13. A Brief History of MRAM:Giant Magnetoresistance (GMR) • 1988: (001)Fe/(001)Cr Magnetic Superlattices • Multilayers experience a dramatic change in electrical resistance under the influence of varying external fields. • MR = 6% • Read times < 50 ns • Limitations • Semiconductor still faster • Low MRAM sense signal • Cell size • Sense lines > 1 µm for write integrity. Baibich et al, Phys. Rev. Lett., 61(21), 1988, 2473.

  14. 1996: Nonvolatile Electronics Significant improvement of signal levels 0.2 µm memory cells – Dense Mismatched film properties achieved by varying thickness Thin = “soft” = lower field for switching Means of reading storage state Thicker = “hard” = higher field Storage Layer A Brief History of MRAM:Pseudo-Spin Valves (PSV) Daughton, J. Magnetoresistive Random Access Memory, 2000

  15. A Brief History of MRAM:Spin Dependent Tunneling (SDT) MemoryAKA Magnetic Tunnel Junction (MTJ) • Quantum tunneling through a thin insulator between two magnetic layers. • Aluminum Oxide • 15 Å • MR > 40%! • Neither magnetic film “pinned” Daughton, J. Advanced MRAM Concepts, 2001.

  16. Magnetoresistive Random Access Memory (MRAM) stores data utilizing the magnetic polarity of a ferromagnetic layer. Current is determined by the rate of electron quantum tunneling through the MRAM stack, which is affected by the polarity of the cells. Resistance is measured across the stack to determine the cell state. The free layer polarization is changeable: thus parallel or antiparallel magnetic moments give low or high resistances, 23σ difference, which can be interpreted as “0” or “1.” MRAM: How it WorksWhat is MRAM? www.freescale.com Durlam et al, IEDM Tech Dig, 2003.

  17. MRAM: How it Works Freescale 4Mb MRAM die • 0.18 µm CMOS with 3 layers of aluminum and 2 layers of copper interconnects • Cladded write lines • 256Kb x 16 organization • 3.3V supply voltage • Symmetrical 25ns read and write timing • Bit cell size = 1.55µm2 • Die size 4.5 x 6.3mm www.freescale.com

  18. The sense circuit (black lines) is composed of a thin oxide pass transistor, which is connected to the MTJ by the top and bottom electrodes. Writing to the MRAM bit is done by accessing write lines 1 and 2 (red lines) in a series of pulses designed alter the state of the free layer. This process is known as Savtchenko switching, which will be discussed later. Reading and Writing to an MRAM bit are accomplished through different circuits. Separate circuits for reading and writing reduces number parasitics improves operation speed. MRAM: How it Works Reading and Writing Durlam et al, IEDM Tech Dig, 2003.

  19. MRAM: How it Works MRAM has layers • The free layer is in fact a Synthetic Antiferromagnetic tri-layer stack (SAF). • The magnetic moments of the top and bottom layers are nearly balanced. The direction of the top FM layer and the sense FM layer are set by Savtchenko switching. • Direction of magnetization of the ferromagnetic (FM) sense layer with respect to the pinned FM layer determines the resistance state of the bit. www.freescale.com Slaughter, CNS Symposium, 2004.

  20. MRAM: How it Works Savtchenko Switching • Named after the late Leonid Savtchenko at Motorola. • Savtchenko switching is a method to toggle bit between high and low resistance states. • The SAF rotates its magnetic axis perpendicular to the applied field. The bit is oriented 45 degrees with respect to the write lines. • 45 degree bits results in higher memory storage densities. Durlam et al, IEDM Tech Dig, 2003.

  21. Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Write Line 1 Write Line 1 Write Line 1 Write Line 1 WriteLine1 H H 2 2 Write Line 2 Write Line 2 Write Line 2 Write Line 2 Write Line 2 I I 2 2 I I H H 1 1 1 1 Write Line 1 On Off On Write Line 2 Off t2 t1 t3 t4 t0 MRAM: How it Works Savtchenko Continued • Pulses are applied in a sequence designed to rotate the SAF 180 degrees to the opposite resistance state. Note that other MRAM cells are not affected during this writing process, because a single line alone cannot switch a bit. Slaughter, CNS Symposium, 2004.

  22. MRAM: How it Works Overlapping Pulse Switches • Method allows for virtually no “disturbs:” writing to one cell does not alter the state of another. • Requires overlapping pulse for switching. • Better than conventional method because in ½ selected distributions all bits along selected lines have a reduced energy barrier during programming. • Susceptible to disruptions from thermal agitation. Slaughter, CNS Symposium, 2004.

  23. Challenges in Manufacturing and Fabrication • Reducing drive currents • Avoiding thermal instabilities • Increasing density of MRAM array

  24. Challenges – cont’d Smith, J. Magnetic RAM at Freescale Semiconductor, 2004 • Reducing Drive Currents: • Lower power use desired • Solution: Coat 3 edges of the conducting strip lines with cladding made of ferromagnetic material • Cladding concentrates the magnetic field toward the magnetic stack stack • Less current is needed to achieve the same magnetic field Daughton, J. Magnetoresistive Random Access Memory, 2000 Durlam et al, IEDM Tech Dig, 2003.

  25. Challenges – cont’d • Avoiding thermal instabilities • As size decreases, barrier energy drops as well, decreasing stability. Cannot just raise Hc, because increases current. • Solution: use heat to help select cell for writing • As material approaches Curie point, Hc drops, so that less current is needed to write • At cooler temps, the energy well can be deeper, increasing stability.

  26. Challenges – cont’d • Increasing density of MRAM array • Limited by density of semiconductor technology • Thermal incompatibilities between magnetic and semiconductor materials. Semiconductor materials processing requires high temperatures, at too high temperatures, magnetic materials lose their properties. • Solution: Laser annealing • Can adjust heating/cooling rate to affect structure • Shallow thermal penetration depth should prevent damage to magnetic materials.

  27. Manufacturing / Fabrication • Lab-Fab approach allows Freescale to achieve manufacturing goals: • Lowest cost options • Limit risk • Fastest time to market

  28. Major MRAM Competitors • Motorola / Freescale • Sampled 4Mb MRAM in 2003, standard product by Sept, 2004. • Demonstrated on 90nm nodes, June, 2005 • Believes that it can be further scaled down to 65nm • Cypress / NonVolatile Electronics • 256Kb MRAM with pin-for-pin replacements for their SRAM • Altis (IBM / Infineon) • 16Mb MRAM on 180nm CMOS technology • Samsung • Demonstrated fully integrated 64Kb MRAM with 240nm CMOS technology • Honeywell • 1Mb MRAM using 150nm CMOS technology in June, 2005 • Other Companies: NEC / Toshiba, Sony

  29. References • Daughton, J.; Magnetoresistive Random Access Memory; 2000. • Klein, L.; Single-layer PHE-based MRAM; 2005. • Akerman, J.; Toward a Universal Memory; Science; 308(4), 508-510; 2005. • Mallinson, John; Magneto-Resistive and Spin Valve Heads; Academic Press; 2002. • Hirota E., Sakakima H., Inomata K,; Giant Magneto-Resistance Devices; Springer; 2002. • Hartmann, Uwe (editor); Magnetic Multilayers and Giant Magnetoresistance; Springer; 2000. • Daughton, James M, Advanced MRAM Concepts; NVE Corporation, 2001. • Slaughter J.M et al; Fundamentals of MRAM Technology; Journal of Superconductivity; 15(1), 19; 2002. • Daughton, J.M.; J. Appl. Phys; 81(8), 3758. • Durlam, M et al.; VLSI Symposium 2002. • Durlam, M., et al.; A 0.18um 4Mb Toggling MRAM; Freescale Semiconductor, Inc.; 2003. • Pohm, A.V. et al.; IEEE Transactions on Magnetics; 33(5), 3280. • Slaughter, J.M., et al.; Magnetic Tunnel Junction Materials for Electronic Applications; JOM-e, 52(6); 2000: http://www.tms.org/pubs/journals/JOM/0006/Slaughter/Slaughter-0006.html • University of Konstanz, Dept. of Physics: http://www.uni-konstanz.de/FuF/Physik/Leiderer/Research/Dynamics_of_Thin_Films/Laser_Annealing/laser_annealing.html • Science and Technology Review: http://www.llnl.gov/str/April01/Cerjan.html • Automotive DeisgnLine – Memory Marquee: http://www.automotivedesignline.com/news/163700597 • Honeywell MRAM Datasheet: http://www.ssec.honeywell.com/aerospace/datasheets/hxnv0100_mram.pdf • Technology Reviews – Williams Advanced Materials: http://www.williams-adv.com/tools/mram-technology-review.php • MRAM-info: http://www.mram-info.com/companies.html • IBM Almaden Research Center – Magnetic Tunnel Junctions (MTJs): http://www.almaden.ibm.com/st/magnetism/ms/mtj/ • Giant Magnetoresistance: http://www.stoner.leeds.ac.uk/research/gmr.htm • How Stuff Works – RAM: http://computer.howstuffworks.com/ram.htm • Wikipedia – Various Topics: http://www.wikipedia.com • Freescale – MRAM fact sheet:: http://www.freescale.com/files/technology_manufacturing/doc/MRAM_FACT_SHEET.pdf • Hyperphysics – Hysteresis in magnetic materials: http://hyperphysics.phy-astr.gsu.edu/hbase/solids/hyst.html#c1

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