Riyadh Philanthropic Society For Science Prince Sultan College For Woman

1. Riyadh Philanthropic Society For Science Prince Sultan College For Woman Dept. of Computer & Information Sciences CS 251 Introduction to Computer Organization & Assembly Language Lecture 3 (Computer System Organization) Processors

2. Outline • From text book: 2.1, 2.1.1, 2.1.2 • The Von Neumann Machine • CPU Organization • Instruction Execution • Timing • Control Unit • CISC vs. RISC • Design Principles for modern Computers Processors

3. The Von-Neumann Machine • The first version of modern computer designed by John Von-Neumann • It is the basis for the majority of digital computer designs • Its main features are: • Using binary arithmetic • Representing the program in a digital form inside the computer’s memory • Organizing the steps of the computer operation into a cycle of decode-fetch-execute. Processors

4. Central Processing Unit (CPU) • It is the brain of the computer • Its function is to execute programs stored in main memory by fetching instructions, decoding them, and executing them. Main Memory • It consists of 3 main components • Arithmetic Logic Unit (ALU) • Control Unit • Registers CPU ALU Control Unit Registers I-D (IOP) O-D Processors

5. CPU – Internal Components • Internal components of the CPU: • I. ALU: Arithmetic & Logic Unit responsible for manipulating data • II. Control Unit: Directs the flow of information. It controls where every bit of data goes • III. Registers: High speed memory locations used to store temporary results & certain control information MDR PC R0 CPU R1 MAR Control Unit IR : : : ALU Rn-1 Registers Processors

6. CPU – Data path A + B A Registers B ALU input register (B) ALU input bus (A) ALU ALU output register A + B) Processors

7. CPU – Data path (Cont.) • The figure corresponds to the data path of a typical Von-Neumann machine • Not all designs have the input registers A & B or the output register. • It consists of: • Registers (Typically 1 to 32) • ALU • Several busses connecting the pieces Processors

8. CPU – Data path Flow Sequence The registers feed into the ALU input registers A & B The input registers hold the input data while the ALU does the execution The ALU performs simple operations such as addition, subtraction, and Boolean logic on its inputs The output value is fed into the ALU output register The result is then stored in one of the registers in the register stack The value of the register could be then saved in memory if required The cycle repeats a gain for any other operation in the ALU Processors

9. CPU – Data path Features Processors • The data path is very important in all machines • Not all machines have the input registers A & B or the output register • The process of running two operands through the ALU and storing the result is called the data path cycle. • The faster the data path cycle is, the faster the machine runs.

10. CPU – Data path Instructions Processors • Most instructions can be divided into one of the two categories: • Register – Register Instructions: Involve instructions between registers • Register – memory Instructions: • Allow memory words to be fetched into registers, where they can be used as ALU inputs in subsequent instructions. • Allow registers to be stored back into memory.

11. Specify the type of operation Immediate data or address Machine Instruction Format • A machine instruction has two parts: • Opcode • Operands 4 bits 6 bits 6 bits Opcode Operand 1 Operand 2 16 bits Processors

12. CPU – Registers Processors • There are three main registers in a typical ALU: • Program Counter Register (PC): It holds the address of the next instruction to be fetched for execution • Instruction Register (IR): It holds the instruction currently being executed • Accumulator Register (AC): It accumulates arithmetic results

13. Instruction Cycle Processors • The processing required for an instruction is called an instruction cycle. • Instruction cycle = fetch-decode-execute cycle • The program is executed one instruction at a time. • The execution of the program is nothing more than a repeated sequence of fetching, decoding, & executing individual instructions, until the program executes a Halt or until a fetal error occurs

14. Instruction Execution Obtain instruction from program storage Instruction Fetch Determine required actions Instruction Decode Locate and obtain operand data Operand fetch Compute result value and status Execute Deposit result in storage Result Store Determine successor instruction Next Instruction Processors

15. Instruction Cycle – In details • Fetch the next instruction from memory into the instruction register • Change the program counter to point to the following instruction • Determine the type of instruction just fetched • If the instruction uses a word in memory, determine where it is. • Fetch the word, if needed, into the CPU register • Execute the instruction • Go to step 1 to begin executing the following instruction Processors

16. Main Memory 97 98 99 100 2 5 101 Load contents of 100 into AC 357 Add contents of 101 to AC 358 Store contents of AC to 100 359 360 361 Example Program code void main(void) { : : a = 2; b = 5; a = a + b; } Processors

17. Main Memory 97 357 98 99 100 2 5 101 Load contents of 100 into AC 357 Add contents of 101 to AC 358 Store contents of AC to 100 359 Start 360 361 Example PC AC IR Processors

18. Main Memory 97 98 99 100 2 Load 100 in AC 5 101 2 A register Load contents of 100 into AC 357 Add contents of 101 to AC 358 Store contents of AC to 100 359 360 361 Example CPU 357 358 PC AC IR Fetch Fetch Processors

19. Main Memory 97 98 99 100 2 5 101 Load contents of 100 into AC 357 Add contents of 101 to AC 358 Store contents of AC to 100 359 360 361 Example CPU 358 PC 2 AC Load 100 in AC IR 2 A register Execute Execute Processors

20. Main Memory 97 98 99 100 2 Add 101 to AC 5 101 5 A register Load contents of 100 into AC 357 Add contents of 101 to AC 358 Store contents of AC to 100 359 360 361 Example CPU 358 359 PC 2 AC Load 100 in AC IR Fetch Fetch Processors

21. Main Memory 97 98 99 100 2 5 101 Load contents of 100 into AC 357 Add contents of 101 to AC 358 Store contents of AC to 100 359 360 361 Example CPU 359 PC 2 + 5 = 7 AC Add 101 to AC IR 5 A register Execute Execute Processors

22. Main Memory 97 98 99 100 2 Store AC in 100 5 101 Load contents of 100 into AC 357 Add contents of 101 to AC 358 Store contents of AC to 100 359 360 361 Example CPU 359 PC 2 + 5 = 7 AC Add 101 to AC IR Fetch Fetch Processors

23. Main Memory 97 98 99 100 7 2 5 101 Load contents of 100 into AC 357 Add contents of 101 to AC 358 Store contents of AC to 100 359 360 361 Example CPU 359 PC 7 AC Store AC in 100 IR Execute Execute Processors

24. Main Memory 97 98 99 100 7 5 101 Load contents of 100 into AC 357 Add contents of 101 to AC 358 Store contents of AC to 100 359 360 361 Example CPU 359 PC 7 AC Store AC in 100 IR Halt Processors

25. Instruction Execution • Can we run a program that imitate the function of the CPU? • Yes, by using an interpreter. • A hardware machine should also be provided (in order to run the interpreter) • This machine can be much simpler & less expensive than a hardware processor. Processors

26. Voltage Time Train of clock pulses Timing • To ensure that the steps of an instruction are carried out in an orderly fashion a clock circuit controls the processor by generating a train of clock pulses. Processors

27. Timing (Cont.) • The time interval between two pulses is known as a clock period • The clock rate or speed corresponds to the number of pulses per second, measured in Mega Hertz (MHz). 1 MHz = 1 million cycles per second • The computer circuits perform an operation on the clock pulse • Each step in the instruction execution cycle requires one or more clock periods • If the clock circuit is sped up, the processor could be made to operate faster. However, each processor has a rated maximum clock speed over which it can’t operate properly Processors

28. Control Unit (CU) • The control unit of the microprocessor is the one responsible for controlling the sequencing of events needed for the execution of an instruction, as well as the timing of this sequence of events. • It obtains instructions from memory in the proper order, and sends them to IR. • Decode them, and issue the necessary timing and control signals to all other devices so that the instructions can be executed correctly. • The control unit is complemented by a clock or timing generator that helps it trigger the occurrence of each event at the correct point in time.  Processors

29. RISC vs. CISC • This control determines the instruction set of the computer and it is mainly split into two main categories: • RISC: (Reduced Instruction Set Computer) • CISC: (Complex Instruction set Computer) • There are two major types of control organization: • Hardwired control • Microprogrammed control Processors