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AIDA ASIC Davide Braga Steve Thomas ASIC Design Group 14 October 2010

AIDA ASIC Davide Braga Steve Thomas ASIC Design Group 14 October 2010. Input comparator:. Now that the original diodes have been replaced by diode-connected pass transistors (not as fast or low impedance) the active-link circuit must take most of the input current.

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AIDA ASIC Davide Braga Steve Thomas ASIC Design Group 14 October 2010

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  1. AIDA ASIC Davide Braga Steve Thomas ASIC Design Group 14 October 2010

  2. Input comparator: Now that the original diodes have been replaced by diode-connected pass transistors (not as fast or low impedance) the active-link circuit must take most of the input current. To avoid the build up of a large input voltage now that the passive link is slower, the active link must respond faster Necessary to optimize the input comparator

  3. Input comparator speed New comparator: appreciably faster across all corners ~ -50% -80% Vin (d=100ns) -with input diode-connected transistors -without Vin (d=200ns) no significant difference between the two, the diode-connected transistors don’t conduce 6.7ns 13ns 5.5ns 3.3ns old comparator Vin (d=300ns) NB: speed function of input voltage. In this simulation Vin=Vthreshold ±100mV, trise=tfall=10ns

  4. High ref, Qin=900pC (~18GeV) (1): link charge (d=100ns-200ns-300ns) Q_input Q_input Q_input Q_HEC Q_HEC Q_HEC LEC charge LEC charge LEC charge

  5. High ref, Qin=900pC (~18GeV) (2): Q_input Q_input Q_input Q_HEC Q_HEC link charge (detail) (d=100ns-200ns-300ns) Q_HEC

  6. High ref, Qin=900pC (~18GeV) (3): new comp new comp new comp old comp old comp old comp The new comparator is generally faster and loses less charge for very fast inputs

  7. High ref, Qin=900pC (~18GeV) (4): old comp new comp d=100ns Significant improvement for slower signals too. (NB: old and new configurations in these presentation have the same link, the only difference is the input comparator) d=200ns d=300ns

  8. Low ref, Qin=900pC (~18GeV) (1): Q_HEC_old Q_HEC_old Q_HEC_old Q_HEC_new Q_HEC_new Q_HEC_new Q_input

  9. Low ref, Qin=900pC (~18GeV) (2): new Vin old new old new old

  10. Low ref, Qin=900pC (~18GeV) (3): new Vin old new old new old

  11. Low ref, Qin=900pC (~18GeV) (3): new old new old Current: fast (~ns) feature, total current comparable (NB: absolute value in this graph due to ancillary circuits in the schematic) new old

  12. Link leakage current: T= -10°C ÷ +50°C Vdd= 3.0V ÷ 3.6V Voffset_preAmps= ±1.2mV Sample of the current through the HEC/LEC link for high-low input references, different process corners. The concern was that a possible offset between the amplifiers’ references could cause significant current. The current is <30 pA in the worst case so it will be easily handled by the feedback compensation circuit low_ref (0.4V), comparator thresh=0.35V [pA] [fA] high_ref (1.6V), comparator thresh=1.65V

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