Reading and Writing to Data Memory

1. Reading and Writing to Data Memory rs Imm • Lwrt Imm(rs) 5 16 Register file Sign extend Offset 32 Base address + Data address to data memory

2. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Offset • Lwrt 4(rs) rs

3. Reading and Writing to Data Memory • Lb rt Imm(rs) Address (32 bits) Data (8 bits) Data memory Sign extension Lbu: Zero extend There are also Lh and Lhu

4. Reading and Writing to Data Memory • Sw rt Imm(rs) • Sh rt Imm(rs) • Sb rt Imm(rs) • Remember: Alignment for Sw and Sh

5. Read and Write From/ to the Data Memory • Lw rt Imm(rs) Sw rt Imm(rs) • Lh rt Imm(rs) Sh rt Imm(rs) • Lhu rt Imm(rs) • Lb rt Imm(rs) Sb rt Imm(rs) • Lbu rt Imm(rs)

6. Zeroext. Branch logic 0 A ALU 4 B + 31 + Sgn/Ze extend Lw rt Imm(rs)

7. Zeroext. Branch logic 0 A ALU 4 B + 31 + Sgn/Ze extend Lw rt Imm(rs)

8. Zeroext. Branch logic 0 A ALU 4 B + 31 + Sgn/Ze extend Lw rt Imm(rs) Read Data

9. Zeroext. Branch logic 0 A ALU 4 B + 31 + Sgn/Ze extend Lw rt Imm(rs) … next instr

10. Zeroext. Branch logic 0 A ALU 4 B + 31 + Sgn/Ze extend Sw rt Imm(rs)

11. Zeroext. Branch logic 0 A ALU 4 B + 31 + Sgn/Ze extend Sw rt Imm(rs) Write Data