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Speed up an FSM Via Nonlinear Look-ahead Transformation & Its Application to Huffman Decoding

Speed up an FSM Via Nonlinear Look-ahead Transformation & Its Application to Huffman Decoding. Fei Li Jinjun Xiong University of Wisconsin-Madison. Motivation. Finite state machine (FSM) Most commonly used in sequential circuits Perform non-linear recursive algorithms

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Speed up an FSM Via Nonlinear Look-ahead Transformation & Its Application to Huffman Decoding

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  1. Speed up an FSM Via Nonlinear Look-ahead Transformation & Its Application to Huffman Decoding Fei Li Jinjun Xiong University of Wisconsin-Madison

  2. Motivation • Finite state machine (FSM) • Most commonly used in sequential circuits • Perform non-linear recursive algorithms • Processing rate limited by iteration bound • Applications require high-throughput • Real-time processing • Huffman decoding • Nonlinear algorithm transformation techniques and concurrent architectures may be of help time to compute the next state

  3. Our Approach • Nonlinear look-ahead transformation • More state transitions in one computational step • A formal transformation method using state transition matrix • Concurrent block processing • High-order look-ahead transformation • High hardware complexity • Long critical path • Block processing • Explore more concurrency • Easy to pipeline

  4. Example: AMI Encoder • Alternate Mask Inversion (AMI) Encoder • map a binary sequence into a bipolar pulse sequence • Maintain zero DC bias • Formal representation of state transition • S(n+1) = T(n) * S(n) • S(n+m) = T(n+m-1)… T(n) S(n) • State indicator vector • State transformation matrix T(n) • Independent of current state • Easy to perform look-ahead

  5. Example: AMI Encoder (cont) • Look-ahead by three, assuming input string 010 • State Transition Matrix • Current State 0 Current State 1 • Concurrent architecture w/ block processing

  6. Achieved and Expected Results • Achieved Results • Derived formal representation of nonlinear look-ahead using state transition matrix • Designed concurrent block processing architecture • Method applied and verified on the AMI encoder design in Verilog • Expected Results • Apply the method to Huffman decoder • Handle the issue of variable length code • Implement it in Verilog • Achieve high-throughput

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