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Gate Design. Static complementary logic gate structures. Switch logic. Other Gate issues. Static complementary gates. Complementary have complementary pullup (p-type) and pulldown (n-type) networks. Static do not rely on stored charge. Advantage of Static complementary gates

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Gate design
Gate Design

  • Static complementary logic gate structures.

  • Switch logic.

  • Other Gate issues


Static complementary gates
Static complementary gates

  • Complementary

    • have complementary pullup (p-type) and pulldown (n-type) networks.

  • Static

    • do not rely on stored charge.

  • Advantage of Static complementary gates

    • Simple, effective, reliable; hence ubiquitous.


Static complementary gate structure
Static complementary gate structure

Pullup and pulldown networks:

VDD

pullup

Network(P type)

out

inputs

pulldown

Network(N type)

VSS


Inverter

If the input voltage is '1' (VCC)

P-type transistor on top is nonconducting

N-type transistor is conducting and provides a path from GND to the output.

The output therefore is '0'.

Inverter

+

out

a


Nand gate
NAND gate

+

out

b

a


Nor gate
NOR gate

+

b

a

out


Aoi oai gates
AOI/OAI gates

  • AOI

    • and/or/invert

  • OAI

    • or/and/invert.

  • Why ?

    • Implement larger functions.

    • Pullup and pulldown networks are compact:

    • smaller area, higher speed than NAND/NOR network equivalents.

  • AOI312

    • and 3 inputs, and 1 input (dummy), and 2 inputs; or together these terms; then invert.


Aoi example
AOI example

out = [ab+c]’:

invert

symbol

circuit

or

and


Pullup pulldown network design
Pullup/pulldown network design

  • Pullup and pulldown

    • Networks are duals.

  • To design one gate

    • First design one network

    • Then compute dual to get other network.

  • Example:

    • design network which

      • pulls down when output should be 0

    • then find dual to get pullup network


Dual network construction

a

a

dummy

c

b

b

c

dummy

Dual network construction


Switch logic
Switch logic

  • Can implement Boolean formulas

    • as networks of switches.

  • Can build switches

    • from MOS transistors—transmission gates.

  • Transmission gates

    • do not amplify but have smaller layouts.






Behavior of n type switch
Behavior of n-type switch

n-type switch

has source-drain voltage drop when conducting:

  • conducts logic 0 perfectly;

  • introduces threshold drop into logic 1.

VDD

VDD - Vt

VDD


N type switch driving static logic
n-type switch driving static logic

Switch underdrives static gate, but gate restores logic levels.

VDD

VDD - Vt

VDD


N type switch driving switch logic
n-type switch driving switch logic

Voltage drop causes next stage to be turned on weakly.

VDD

VDD - Vt

VDD


Behavior of complementary switch
Behavior of complementary switch

  • Complementary switch

    • Products full-supply voltages for both logic 0 and logic 1:

      • n-type transistor conducts logic 0;

      • p-type transistor conducts logic 1.


Charge sharing
Charge sharing

  • Values are stored at parasitic capacitances on wires:


Charge sharing example

0

0

0

Charge sharing example

1

1

1

1




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