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Old ROD + new BOC design plans

Old ROD + new BOC design plans. T. Flick University Wuppertal ATLAS Tracker Upgrade Week 23.-27.02.2009 CERN. Overview. Reminder of present design Recommendations of System Design TF Consequences of using the “old” ROD BOC card requirements and design plan O pen (not covered) issues.

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Old ROD + new BOC design plans

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  1. Old ROD + new BOCdesign plans T. Flick University Wuppertal ATLAS Tracker Upgrade Week 23.-27.02.2009 CERN

  2. Overview • Reminder of present design • Recommendations of System Design TF • Consequences of using the “old” ROD • BOC card requirements and design plan • Open (not covered) issues old ROD + new BOC

  3. Present Layout Add/adopt components for higher speed on-detector Exchange BOC Keep ROD and TIM TTC: From off-detector to on-detector, BPM encoded clock (40 MHz) and data (40 Mb/s) signal Data: From on-detector to off-detector, 40 Mb/s or 80 Mb/s NRZ signal. old ROD + new BOC

  4. Recommendations • System Design (for sLHC) Taskforce set up a recommendation document for the IBL readout system: Summary of IBL I/O Recommendations • TTC • Optical Downlink BPM encoded: • 40 MHz clock and 40 Mb/s commands • Electrical links DORIC to FE-I4 • 2x LVDS: 40 MHz clock & 40 Mb/s commands • Each link drives two FE-I4 chips • Data Output • Electrical link FE-I4 to VDC • 1x LVDS / FE-I4 at 160 Mbps • Encoded as 8bit/10bit • Optical Uplink: 1 optical link/FE-I4 at 160 Mb/s old ROD + new BOC

  5. Recommendations • BOC/ROD • TTC: • 40 MHz clock & 40 Mb/s data • BPM encoded as present system • Data: • Input 160 Mb/s input links • 8bit/10bit decoded in BOC • Data passed to ROD as 4 x 40 Mb/s streams • 8 input links per BOC/ROD old ROD + new BOC

  6. Use the “old” ROD • Present ROD can be used • It needs 40 Mb/s input streams • Can drive out 160 MB/s data due to S-Link capability • New firmware can be used, but would not really be needed though Readout Driver (ROD) old ROD + new BOC

  7. Consequences • 40 MHz clock sent to detector • Need of clock multiplier on-detector to achieve the 160 Mb/s upstream (need at least 80 MHz clock on FE-chip) • Encoding on both, down- and up-link • BOC must decode the data • 8 input links at 160 Mb/s can be handled • Need to produce many cards with few channels • Install 4 new crates for readout hardware old ROD + new BOC

  8. New BOC Requirements • Transmitting section unchanged (only in channels) • S-Link section unchanged • Clock section needs to be adopted to higher clocks (160 MHz clock) • Receiving section • must handle 160 Mb/s input stream • must split 160 Mb/s into 4x 40 Mb/s streams • Decoding of 8/10b data (and clock?) • Phase and sampling threshold adoption • Synchronize data to ROD clock Present BOC card Rx Plugin Tx Plugin old ROD + new BOC

  9. Open Issues • 1 TTC link per 2 FE chip (while 1 Data link per single FE): • Implication on modularity • 8 data links per BOC/ROD are fixed maximum • 4 TTC links per BOC/ROD? • Fibre ribbon splitting?? • Channel wise control of VCSEL and PiN diodes • Optical components, coming from where? • Connector layout • Communication protocol • No time for new ASICs! • On-detector clock multiplier old ROD + new BOC

  10. Design Plans • Wuppertal and Heidelberg groups plan to work together on this *) • Lay down requirements in first half of 2009, then: • Card design work will be done in Heidelberg • Test system development in Wuppertal • Test work can be shared • Planed is prototyping of 2 versions until 2011 and the production until 2012. *) Funding decision pending, expected soon old ROD + new BOC

  11. Schedule • Aim is to be ready early 2012, latest mid 2012. • It will be difficult to get series BOCs for system-test usage before. • Prototypes for system-tests should be available. old ROD + new BOC

  12. Conclusion • Old ROD can be used with a newly designed BOC card for reading out the IBL at 160 Mb/s per FE-chip. • Need 64 new BOC cards /RODs for IBL (presently we have 132 pairs) • Need 4 new crates in 2 racks to house the card pairs • BOC design and production by Wuppertal / Heidelberg until early 2012 is foreseen, including 1 or 2 prototypes. • Time is short, we need to be very efficient! old ROD + new BOC

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