1 / 2

Figure 1

Figure 1. PC. Emulation System. SOC RTL. Display. Memory [Embedded SOC Software]. Protocol Interface. MMC. Keypad. Terminal. Transactor C Interface. Transactor HW Interface. Protocol Interface. Terminal. Transactor C Interface. Transactor HW Interface. Protocol Interface.

Download Presentation

Figure 1

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Figure 1 PC Emulation System SOC RTL Display Memory [Embedded SOC Software] Protocol Interface MMC Keypad Terminal Transactor C Interface Transactor HW Interface Protocol Interface Terminal Transactor C Interface Transactor HW Interface Protocol Interface Display Transactor C Interface Transactor HW Interface Protocol Interface Camera Camera Transactor C Interface Transactor HW Interface Protocol Interface Keypad Ethernet USB Transactor C Interface Transactor HW Interface Protocol Interface USB Transactor C Interface Transactor HW Interface Protocol Interface Ethernet Transactor C Interface Transactor HW Interface Protocol Interface Audio Audio Files Transactor C Interface Transactor HW Interface Protocol Interface I/O Files Software Test Environment Interface Hardware SoC Prototype

  2. Hard Cores RAM TX RX Figure 2 ZeBu HW/SW Co-Verification Platform ZeBu Compilation Flow PC / Linux PCI I/F ZeBu Test Environment DUT [RTL] DUT Logic Emulation Resources Up to 64 Xilinx V2-8000 Memory Server Clock Server Cycle-Based Verilog/VHDL FPGA Synthesis ASIC Synthesis C/C++ SystemC Signals Reconfigurable Test Bench (RTB) ZeBu Compiler DUT Compilation Vectors Embedded Test Bench Transaction-Based RTB Generation Hardware Transactors C/C++ Logic Analyzer Dynamic Traces SystemC Channels Xilinx P&R Xilinx P&R Xilinx P&R SW Debuggers RTB Config Files DUT Config Files In-Circuit Emulation with Target System

More Related