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EE 4345 – Semiconductor Electronics Design Project

EE 4345 – Semiconductor Electronics Design Project. Transistor Current Sources and Active Loads. Anuj Shah Himanshu Doshi Jayaprakash Chintamaneni Nareen Katta Nikhil Patel Preeti Yadav. Current Sources.

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EE 4345 – Semiconductor Electronics Design Project

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  1. EE 4345 – Semiconductor Electronics Design Project Transistor Current Sources and Active Loads Anuj Shah Himanshu Doshi Jayaprakash Chintamaneni Nareen Katta Nikhil Patel Preeti Yadav

  2. Current Sources • Current sources made by using active devices have come to be widely used in analog integrated circuits as Biasing elements and as load devices for amplifier stages • The use of current sources in biasing can result in superior insensitivity of circuit performance to power supply variations and to temperature

  3. A simple 2-transistor current source

  4. Simple current source Since Q1 and Q2 have the same base-emitter voltage. Their collector currents are equal, Ic1=Ic2 Summing currents at the collector of Q1 gives, Thus, For identical devices Q1 and Q2, the output and the reference Currents are equal

  5. Collector characteristics for an npn transistor

  6. Norton equivalent representation Of a transistor current source Thevenin equivalent Representation of a Transistor current source

  7. Simple current source with current gain

  8. The collector current Ic2 is different form the reference Current by a factor [ 1 + ( 2/ßf )] The emitter current of the transistor Q3 is given by, Summing currents at the collector of Q1, Since Ic1 and Ic2 are equal, Thus, the reference and the output current differ only by a factor of 1/ßf2

  9. Widlar current source

  10. Widlar current source Assuming that the transistors are identical and that Vce2 is high enough to allow Q2 to operate in the active region,The collector current of Q2 is given by,

  11. Voltage equation around the base-emitter loop gives, Solving for R2 gives Neglecting the base currents,

  12. Design a widlar current source , given Vcc=15volts. Assume identical transistors.Also, design a 10uA current mirror and compare total resistance required in the two circuits. Let Iref =1mA Design of current mirror,

  13. Cascode current source with bipolar transistors Performing a full small-signal analysis on this circuit, including the finite small-signal resistance of Q1 and Q4 We obtain, Ro =ß0 r0/2

  14. Bipolar Wilson current source

  15. Conventional Differential Amplifier • Resistors are used as load elements • Large Voltage Gain – requires large power-supply voltage and • large values of resistors • Example: • A voltage gain of 500 would require • and , Rc would have to be

  16. Current Sources as Active Load • Common-Emitter Amplifier with Active Load • Emitter-Coupled Pair with Active Load • Input Offset Voltage of the Emitter-Coupled Pair with • Active Load • Common-Mode Rejection Ratio of the Emitter-Coupled Pair with Active Load • Common-Source Amplifier with Active Load

  17. Fig.Common-emitter amplifier with active load

  18. Fig.npn collector characteristic with pnp Load line superimposed Transistors NPN PNP Initially at Vi=0 at point 1 Off Saturates As Vi Increases at point 2 On On at point 3 On On at point 4 Saturated Saturated

  19. Large – Signal Model

  20. Fig.dc transfer characteristics Of common-emitter Amplifier with active load &

  21. Fig.Small-signal equivalent Circuit for common-emitter Amplifier with active load R0=(ronop+ropon) • Typical values for voltage gain are 1000 to 2000 range.

  22. Fig.Emitter-coupled pair with Active load • Drawback: • The quiescent value of the common-mode output voltage is very • sensitive to the value of the emitter-biasing current source and • the active-load current sources.

  23. Fig.Common-mode half-circuit for emitter-coupled pair with active load

  24. Output voltage Voc is very sensitive to the voltage at the base of Q6, which is influence by Iref2. • Example: • If Iref1 and Iref2 are different by 4% , the output voltage Voc will change by about 2V. • The same change result from a 1mV mismatch between Q6 And Q7.

  25. This circuit eliminates the common-mode problems but provides a single output with much better rejection of common-mode Input signals.

  26. Large signal behavior model Fig.Active-load stage with output connected to a voltage source • Load resistance is zero. • Vbias is adjusted in order to keep Q2 and Q4 in forward Active region.

  27. where

  28. ,Where • Early factor is on the order of 2 * 10-4

  29. Device Mismatch Effects: • Presence of Component mismatches within the Amplifier itself and drifts of component values with Temperature produce differential voltages at the output that are indistinguishable from the signal being amplified. • For Transistor Differential Amplifiers the effect of mismatches is represented by two Quantities,the input offset voltage and the input offset current.

  30. Equivalent Circuit with identically matched devices Circuit Containing Mismatches

  31. Input Offset Voltage is given by the expression at 300K where Is represents the Saturation Current where Wb(VCB) is the base width of the function VCB NA is the acceptor density in the base and A is the emitter Area

  32. Input Offset Voltage of the Emitter Coupled Pair with Active • Load • For a Resistive Load the Input Offset Voltage arises mainly due to the mismatches in Is in the Input Transistors and from mismatches in the • collector load Resistors. • For an Active Load the input offset voltage results from mismatches in the input Transistors and load devices and from the base current of the load devices.

  33. Emitter Coupled Pair with Active Load

  34. Input Offset Voltage of the Emitter Coupled Pair with Active Load and The Collector Current Ic4 is related to Ic3 by The Collector Current Q2 is equal to (-Ic4) and thus The Current Ic1 equals (-Ic3),plus the base currents in the pnp transistors

  35. The input offset voltage is given by In a Worst Case, the Offset Voltage is 0.2VT • These Circuits have significantly higher offset Voltage than the Resistively loaded case • The offset Voltage can be reduced by inserting resistors in the Emitters of Q3 and Q4.

  36. Actively Loaded Emitter Coupled Pair for improved Offset

  37. Common-Mode Rejection Ratio of the Emitter Coupled Pair with • Active Load • CMRR is defined as the Magnitude of the ratio of differential to • Common Mode Gain. • Provides conversion from a differential signal to a signal that is referenced to ground.This type of Conversion is required in all differential input,single-ended output amplifiers. • Simplest differential to single-ended converter is the resistively Loaded emitter coupled pair.

  38. Differential to Single ended Conversion Using resistively loaded Emitter coupled Pair Differential to Single ended Conversion Using actively loaded Emitter coupled Pair

  39. The output is given by Transistor Q3 operates at twice the current of Q1 and Q2 CMRR of the resistively loaded stage is the inverse of the  of the current source Transistor when a simple current source is used as a biasing element.

  40. For an active-loaded case • In case of Resistively loaded case ,changes in the common Mode input will cause • changes in the bias current IEE because of the finite output resistance of the biasing • current source.This will cause a change in Ic2 and an identical change in Ic1. • Because of the active load ,the change in Ic1 will produce a change in the currents • flowing in the pnp load transistors ,which produces a change in the collecter current • of Q2.So the output does not change at all in response to common Mode Inputs. • Analytically

  41. Common-Source Amplifier with Active Load Common Source Amplifier using an NMOS driver and PMOS active load. When M1 and M2 are forward active,the small signal gain is Gain for NMOS depletion-load transistor

  42. Common-Source Amplifier with p channel transistor Current source load Transfer Characteristic

  43. I-V Characteristic of n-channel depletion mode load transistor

  44. Common Source Amplifier with depletion mode transistor load and dc transfer characteristic

  45. Common Source Amplifier with Enhancement-Mode load Common-Source Amplifier with enhancement-mode load and transfer characteristic

  46. Source Coupled Pair with Active load • Widely used in CMOS Circuit Design

  47. References: • Analysis and Design of Analog Integrated Circuits, 3rd Edition by Paul R.Gray and Robert G.Meyer. • Analog integrated circuit design,1st edition by David Johns and Ken Martin • Electronics,2nd Edition, by Allan R.Hambley

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