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Instructions and Addressing (cont’d.)

This presentation explores the concept of index addressing in assembly language, detailing its advantages and disadvantages. It showcases the notation used, such as ADD.X(R1),R3, where X is a numerical offset, including example instructions to demonstrate its practical applications. The importance of shift operations and logical instructions is highlighted, with examples of logical and arithmetic shifts. Additionally, it discusses the role of assemblers in translating high-level languages to machine code, emphasizing their significance in programming and hardware resource access.

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Instructions and Addressing (cont’d.)

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  1. Instructions and Addressing (cont’d.) http://www.pds.ewi.tudelft.nl/~iosup/Courses/2012_ti1400_4.ppt Course website: http://www.pds.ewi.tudelft.nl/~iosup/Courses/2012_ti1400_results.htm

  2. Index addressing (1) + instruction opcode Reg index operand operand registers memory or registers

  3. Index addressing (2) Advantages: Allows specification of fixed offset to operand address Disadvantages: Extra addition to operand address Notation:ADD X(R1),R3 (X=number) Meaning:[R3]  [R3] + M([R1] + X)

  4. Example index addressing Move #E,R0 n Empoyee ID sex age salary Empoyee ID N E Move N,R1 0(R0) 4(R0) Clear R2 program loop 8(R0) Add 8(R0),R2 L 12(R0) 16(R0) Add #16,R0 20(R0) sex age salary Decrement R1 Branch>0 L Move N,R1 Program with index addressing Div R1,R2 Move R2,Sum Q1: What does this program do?

  5. Additional modes Some computers have auto-increment (decrement instructions) Example: (R0)+ Meaning .. M(R0)..; [R0]  [R0]+1 Example: -(R0) Meaning [R0]  [R0]-1; .. M(R0)..

  6. Additional Instructions Logic instructions Not R0; invert all bits in R0 And #$FF000000,R0; AND with bit string Shift and rotate instructions Many variants for different purposes 6

  7. Logical shifts used in bit Packing Logical shift left 0 C R0 LShiftL #2,R0 . . . before: 0 0 1 1 1 0 0 1 1 . . . virtual: LShiftL #1,R0 0 1 1 1 0 0 1 1 0 . . . after: LShiftL #2,R0 1 1 0 0 1 1 0 0 1 Logical shift right 0 R0 C LShiftR #2,R0 . . . 0 1 1 1 0 0 1 1 before: 0 . . . virtual: 0 LShiftR #1,R0 0 0 1 1 1 0 0 1 . . . after: 0 0 0 1 1 1 0 0 1 LShiftR #2,R0 7

  8. Arithmetic shifts Arithmetic shift right (signed shift) AShiftR #2,R0 R0 C . . . before: 0 1 0 0 1 1 0 1 0 . . . virtual: 0 AShiftR #1,R0 1 1 0 0 1 1 0 1 . . . after: 1 1 1 0 0 1 1 0 1 AShiftR #2,R0 Q1: AShiftR by n bits is equivalent to division by 2n for numbers in 2C or 1C? Tough questions Q2: Rounding negative number shifts towards 0 or -infinity? 8

  9. Rotate Rotate left w/o Carry C R0 RotateL #2,R0 . . . before: 0 0 1 1 1 0 0 1 1 . . . virtual: RotateL #1,R0 0 1 1 1 0 0 1 1 0 . . . after: RotateL #2,R0 1 1 0 0 1 1 0 1 1 Rotate left w/ Carry C R0 RotateLC #2,R0 . . . before: 0 0 1 1 1 0 0 1 1 . . . virtual: RotateLC #1,R0 0 1 1 1 0 0 1 1 0 . . . after: RotateLC #2,R0 1 1 0 0 1 1 0 0 1 9

  10. Assemblers Problem: How to Program Computers?

  11. Program Creation and Execution Flow type source program Source in ASCII editor translate assembler listing Source and Object code +error messages object code machine 1 machine 2 link/load linker/loader run input/ output memory image

  12. Three levels of instructions C/C++, Java, … high level programming language program expressed in a high-level language translation instruction set program expressed as a series of instructions Assembler direct implementation fetch/execute implementation program execution in hardware

  13. Instructions and Addressing Introduction Assembler: What and Why? Assembler Statements and Structure The Stack Subroutines Architectures: CISC and RISC 13

  14. Why assembler? [1/2] • Assembler is a symbolic notationfor machine language • It improves readability (vs machine code): • Assembler: Move R0,SUM • Machine code: 0010 1101 1001 0001(16 bits)

  15. Why assembler ? [2/2] Lecture 0 • Speed of programs in critical applications • Access to all hardware resources of the machine • Target for compilers Source: http://www.cs.berkeley.edu/~volkov/cs267.sp09/hw1/results/

  16. Q: Where to get ISA references? Manufacturer’s documentation Third-party manuals (ATTN: may be incorrect)

  17. Q: Does each processor have its own machine language (instruction set)? Shared across generations and even competitors developer.download.nvidia.com/compute/cuda/3_1/toolkit/docs/ptx_isa_2.1.pdf NVIDIA www.eng.ucy.ac.cy/theocharides/Courses/ECE656/ia-32.pdf Intel AMD Cyrix … 1982 1985 1989 1993 1995

  18. Q: Are similar instructions identical on different platforms? Often, they are not NVIDIA Intel AMD Cyrix

  19. Machine Language [1/4] • Is Machine language difficult to learn? • That holds for every unknown language. Machine language is more difficult because you have to work with the specifically defined micro instruction set. • Is Machine language difficult to read and to understand? • Of course, if you do not know the language;however, assembler is more difficult to read and understand than a High Level Language (HLL).

  20. Machine Language [2/4] • Is Machine language difficult to write? • Often HLL languages use libraries to make programming simpler. Machine language programmers often start from scratch. However, full performance may require machine language implementation (or a smart/expensive compiler) • Machine languageprogramming is time consuming • One estimates that the time for coding a program is only 30% of the total development time.

  21. Machine Language [3/4] • Compilers makemachine language superfluous • A good machine language program often looks very different from a compiler generated program. Generally,a C program will win over a hand-made assembly program (unless you’re Michael Abrash … or a student at TU Delft) • Assembler still heavily used for hot/optimized functions (esp. scientific codes), real-time platforms, embedded systems, …

  22. Machine Language [4/4] • Is Machine language difficult to maintain? • Maintainable programs are not specifically dependent on the language they are written in, but more on the way they are contructed • Is Machine language difficult to debug? • Often debuggers output both the HLL and the machine language, and the error can only be found in the generated machine language

  23. Case-in-Point • Universele Brander Automaat (UBA)

  24. Case Universele Brander Automaat Klant: Nefit Fasto B.V. Markt: HVAC (AirCo) Ontwikkelen (1990) en produceren (100k/jaar) van de UBA universele brander- automaat voor Nefit Fasto voorzien van een bipolaire Application-Specific Integrated Circuit (ASIC). Eerste product met een universeel karakter, die een fail-safe approval heeft.

  25. Case Universele Brander Automaat Ignition 230V , Pump and Fan 6 schakel ingangen 8 analoge ingangen 3 schakeluitgangen 3 modulerende uitgangen 2 draads communicatie bus Externe KIM module aansluiting met 178 bytes config settings ASIC and micro-Computer

  26. UBA software opbouw HWIO Application C- language 15 Kbyte 1 Kbyte

  27. UBA micro computer HWIO MC68HC05B16 24 I/O bi-directional 8 A/D analogue inputs 2 TCAP input timers 2 TCMP output compare 2 PWM D/A outputs 1 SCI serial output 1 COP watchdog 256 bytes RAM 256 bytes EEPROM 16 Kbytes (EP)ROM 1 Kbytes

  28. UBA PuR After Power up Reset special routine[ see also The Zen of Diagnostics, http://www.ganssle.com/articles/adiags1.htm ] - all instruction set in test routine - 16-bit CRC (99,98% data integrity) - Walking A0 and 05 RAM test (pattern sensitivity) - Check on A/D (converter linearity) - Main loop partitioned in modules - Module check in each phase - Acknowledge module check by pulse to ASIC (350ms) - Interrupt program termination check by pulse to ASIC (20ms)

  29. UBA Assembly • Check instruction set • Test of each opcode over and over again • Emergency stop at fault detection • Not possible in “C” • Check memory • As part of the program • Emergency stop at fault detection • Difficult in “C” • Better control on application • Compiler generated code must be checked for correctness.

  30. Instructions and Addressing Introduction Assembler: What and Why? Assembler Statements and Structure The Stack Subroutines Architectures: CISC and RISC 30

  31. Assembler Statements • Declarations • no code generation • memory reservation • symbolic data declarations • where to start the code execution • Executable statements • are translated to real machine instructions (often, one-to-one)

  32. Data declarations Label operation operand S EQU 200 ORIGIN 201 N DATA 300 N1 RESERVE 300 ORIGIN 100

  33. Program Addr operation operand START Move N,R1 Move #N1,R2 Clear R0 LOOP Add (R2),R0 Incr R2 Decr R1 Branch>0 LOOP Move R0,S Return End START

  34. Memory lay-out S Move N,R1 100 200 N ..... 300 101 201 ..... ..... 102 202 N1 ..... ..... 103 203 ..... ..... 104 ..... ..... 105 Branch >0 106 107 501 Nn

  35. Structure assembler [1/3] • Assembler is hardly more than substitution • substitute 0001 for Move • substitute 0000 0000 0000 0101for#5 • Assembler is level above machine language • Assembler languages for different architectures are alike, but not identical

  36. Structure assembler [2/3] Assembler programs contain three kind of quantities: • Absolute: • opcodes, contants:can be directly translated • Relative: • addresses of instructionswhich are dependent of final memory location • Extern: • call to subroutines

  37. Structure assembler [3/3] • Literals:constants in programs • Some assemblers act as if literals are immediate operands • Example: Load #1 is equivalent to: Load One ... One: 1

  38. Number notation • Numbers can be represented using various formats: ADD #93,R1 or ADD #%01011101,R1 or ADD #$5D,R1

  39. Instructions and Addressing Introduction Assembler: What and Why? Assembler Statements and Structure The Stack Subroutines Architectures: CISC and RISC 39

  40. The Stack Main idea • (Large?) Memory space used to store program data • Items are added to the stack through a PUSH operation • Items are removed from the stack through a POP operation Details • Often, a stack is a contiguous array of memory locations • Often, any number of stacks can be set up by a program • Often, only one stack can be used at a time (changing the active stack possible at any time) Q1: Why use stacks? Q2: Implications?

  41. Stack registers CPU SP PC Stack Pointer Main Memory

  42. 70 300 20 10 60 Stack operations 0 1 SP

  43. Push Subtract #4,SP Move R0,(SP) 0 SP 1 80 70 300 or: Move R0,-(SP) 20 10 60 80 R0

  44. Pop 0 Move (SP),R0 Add #4,SP 1 80 70 SP 300 or: Move (SP)+,R0 20 10 60 70 R0

  45. Instructions and Addressing Introduction Assembler: What and Why? Assembler Statements and Structure The Stack Subroutines Architectures: CISC and RISC 45

  46. Subroutines • More structure in programs • Mimics procedure and function callsin High Level programming Languages (HLL)

  47. Calling mechanism Call SUB 200 next instr. 204 PC Link ................ 204 1000 ................ PC Link RTS 204

  48. Question Is a Link register sufficient ?

  49. Subroutine nesting • For nesting of subroutines return address in link register must be stored • Can be implemented by using stacks

  50. Subroutine stack Stack PC Link 204 subroutine Move Link, -(SP) ...... Move (SP)+, Link RTS

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