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Computer Architecture The Anatomy of Modern Processors

Computer Architecture The Anatomy of Modern Processors. Processor Organization John Morris. RISC and CISC. Processors can (usually) be classified as Reduced Instruction Set Computers (RISC) Small set (30-100) of simple instructions Most ‘execute’ in one cycle

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Computer Architecture The Anatomy of Modern Processors

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  1. Computer ArchitectureThe Anatomy of Modern Processors Processor Organization John Morris

  2. RISC and CISC • Processors can (usually) be classified as • Reduced Instruction Set Computers (RISC) • Small set (30-100) of simple instructions • Most ‘execute’ in one cycle • Spend one cycle in the execution unit • or • Complex Instruction Set Computers (CISC) • Large number of instructions • Using all possible ‘opcodes’: 28 or more! • Most instructions need >1 cycle to execute • Many instructions are complex • Can require 100s of cycles! • Uses internal program - microcode - to control operation Anatomy of Modern Processors

  3. ALU Basic Elements Data I/O Bus Address Control System Interface Unit Program Counter PC Register File Instruction Register IR Branch Unit Load/Store Unit Chip Boundary Other devices: Microcode (CISC systems) Cache Virtual Memory Support (MMU) TLB …. Anatomy of Modern Processors

  4. Instructions • In this context, an instruction is a word containing a bit pattern defining a basic machine instruction and its operands • For a register machine • Add values in registers r1 and r2 and store sum in r0 • add r0, r1, r2 • For a stack machine • Add values at top of stack and push result back • add • Compare an instruction in a high level language • c = a + b • A compiler takes this line of text and typically converts it to several machine instructions • (Assume addresses of a, b, c already in registers r0, r1, r2) ld r3, r0 ;Get value of a into r3 ld r4, r1 ;Get value of b into r4 add r3,r3,r4 ;Add values in r3, r4 – store sum in r3 st r3, r2 ;Store sum in c Each of these operations is a basic operation of the machine Anatomy of Modern Processors

  5. Instructions • For Java, there is a two stage process Program (text form) javac byte code (.class files) java+ just-in-timecompiler Java (default version) Runs program byinterpreting byte code Machine instructions (directly executableby target machine) Anatomy of Modern Processors

  6. 9 8 5 5 5 Machine instructions • Pattern of bits • Detailed format depends on architecture • Example: • 32-bit RISC processor eg add r0, r1, r2 32 Opcode (secondary) Opcode (primary) Operands (depend on operation) add 0…0 00000 00001 00010 Anatomy of Modern Processors

  7. Instructions • Instruction set defines architecture! • Hence ‘Instruction Set Architecture’ commonly used to refer to the basic operation capabilities of a machine • Various styles • Register set architectures • Use a register file as the highest level of the memory hierarchy • Typical modern machine has 32 32- or 64-bit integer registers • + (possibly separate) floating point registers • Most operations use the registers as ‘scratchpad’ memory • add r0,r1, r2 // Add contents of r1 and r2, place in r0 • ld r3, r4 // Load word at address found in r4, place in r3 • jmp r3 // Jump to address in r3 0 1 2 3 4 5 31 Anatomy of Modern Processors

  8. Instructions • Instruction set defines architecture! • Accumulator machines • Only one register - an ‘accumulator’ • Predecessors of register machines • Same idea • Calculations use very fast ‘scratch-pad’ memory for working data • but only one location • Instructions • ld mem_add ; load accumulator from memory • add mem_add ; add value at mem_add to accumulator Anatomy of Modern Processors

  9. Instruction Set Architectures • Stack machines • Theoretically interesting • All high level languages call functions (‘methods’) extensively • Use a logical stack to store • Arguments • Local variables • Return address • Software simulates a stack by pushing and popping stack frames • Why not implement the stack directly in hardware? push pop TOS TOS-1 Anatomy of Modern Processors

  10. Instruction Set Architectures • Stack machines • Theoretically interesting • All high level languages call functions (‘methods’) extensively • Use a logical stack to store …. • Why not implement the stack directly in hardware? • Easy - with shift registers • Pushing a value just shifts all the rest along • Popping is the reverse • All operations refer to an operand stack • add // Pop two values, add, push result back • ld 3452 // Load from address 3452, push onto stack • jmp // Pop address from stack, jump to it • Only TOS (Top of Stack) is ‘visible’ • Several real machines • KDF-9, Burroughs, Hewlett-Packard push pop TOS TOS-1 Anatomy of Modern Processors

  11. Instruction Set Architectures • Stack machines • In the instruction set (ISA) • All operations refer to an operand stack • add // Pop two values, add, push result back • ld 3452 // Load from address 3452, push onto stack • jmp // Pop address from stack, jump to it • Only TOS (Top of Stack) is ‘visible’ • Several families of real machines have been built • English Electric (KDF-9), Burroughs (B5xxx), Hewlett-Packard (HP3000) • Java Virtual Machine (JVM) defines a stack machine • All implementations use software, registers and memory to implement the stack • Revived interest in stack machines • Able to execute the byte codes directly! push pop TOS TOS-1 Anatomy of Modern Processors

  12. A B c n z v op ALU 4 C Basic Components • Arithmetic Logic Unit • Does all the calculation! • +, -, and, or, xor, not, shift, x, /, … • Variants • Integer • Floating Point • Double Precision • High performance machine will have several! Anatomy of Modern Processors

  13. cin A B c n z v op ALU 4 C Basic Components • Arithmetic Logic Unit • Inputs • Operands - A, B • Operation code • Bit pattern to indicate +,-, and, …. • Obtained from encoded instruction • (Sometimes) Carry in • Outputs • Result - C • Status codes • Usually • c - carry out from +, -, x, shift • n - result is negative • z - result is zero • v - result overflowed • Floating point units may have more Anatomy of Modern Processors

  14. cin A B c n z v op ALU 4 C ALU - Operation codes • Operation codes • Example • Use 5 lines for op • Set cin from instruction • ALU is justa set of gates! • Bits of op determineresult • Note some op codesproduce A, B, ~A, ~Band constants,0, 1, -1 • Not all 32 possiblevalues of op produce‘useful’ results! • Bits of op could comedirectly from instructionword op Anatomy of Modern Processors

  15. MAR EN EN EN EN OE OE OE A Simple Machine • Key element: data path • Buses • B (right ALU input) • C (result) • Registers • Memory Address (MAR) • Memory Data (MDR) • Program counter (PC) • Memory Instruction (MIR) • H (Accumulator) • Signals • Enable (EN) - latch data from C • Output Enable (OE) -drive data onto B MDR MainMemory EN PC MIR B bus C bus H c n z v ALU control ALU 4 Shifter Anatomy of Modern Processors

  16. MAR EN EN EN EN OE OE OE Simple Machine - Operation • PC initialized with bootstrap location egffff0 • Transfer PC to MAR via B bus, ALU • Control ‘program’ sets • PC:OE, • ALU control to 010100and • MAR:EN • Transfer MAR to memory address bus • Memory response ‘captured’ in MIR • Bits in MIR now set data path control bits • Usually indirectly • (directly in a very simple machine) MDR MainMemory EN PC MIR B bus C bus H c n z v ALU control ALU 4 Shifter Anatomy of Modern Processors

  17. MAR EN EN EN EN OE OE OE Simple Machine - Operation • Bits in MIR now set data path control bits • Usually indirectly • (directly in a very simple machine) • Execute instruction just fetched from memory on next clock cycle! • PC needs to be incremented to fetch next instruction • Use ALU to increment it • One cycle only! • How? • Tutorial question • Start the whole process again! MDR MainMemory EN PC MIR B bus C bus H c n z v ALU control ALU 4 Shifter Anatomy of Modern Processors

  18. MAR EN EN EN EN OE OE OE 5 6 Control of our simple machine • Count the bits (signals) needed to control the data path • ALU 6 • MAR 2 • MDR 2 • PC 2 • MIR 1 • H 1 • Shifter 5 • Shift control 3 • Total 22 • ‘Instruction’ loaded from memory needs to assert 22 lines to control the data path • Actually quite a few more are needed when all aspects of our simple machine are considered! MDR MainMemory EN PC MIR B bus C bus H c n z v ALU control ALU 4 Shift bits Shifter Shift control Anatomy of Modern Processors

  19. 8 32 ~80+ Microcontroller • Where do the 22+ bits needed to control the data path come from? • They’re stored in an internal microprogram memory • It contains a microprogram for each instruction • Opcode addresses first word of each microprogram Microprogram Memory Instruction Opcode Data Microprogram Word mcode address 1024 Anatomy of Modern Processors

  20. EN EN EN EN OE OE OE 8 32 ~80+ 5 6 Microprogram Memory Instruction MAR Data Opcode MDR Microprogram Word mcode address EN PC MIR B bus mprogram Instruction Register C bus H Next add EN Shift ALU c n z v ALU control ALU 4 • Bits of mprogram word control data path • Set ALU operation • Enable registers • Enable outputs • Determine next mprogram address Shift bits Shift control Shifter Anatomy of Modern Processors

  21. Microprogram • ‘Instruction’ fetched from memory • Selects the start of a mprogram • Microprogram words (‘minstructions’) • Individual bits control data path settings • mprogram advances one word per clock cycle(usual behaviour – note Tanenbaum has a different scenario) • Individual mprograms take several words • Each machine instruction takes several cycles to complete • Jumps • Next address field selects next mprogram word on jumps • Conditional jumps • Setting of ALU status bits (ncvz + …) determines whether jump taken Anatomy of Modern Processors

  22. EN EN EN EN OE OE OE 8 32 ~80+ 5 6 Microprogram Memory Instruction MAR Data Opcode MDR Multiplexor Selects input depending on value of control (1/0) input Microprogram Word mcode address EN PC +1 1/0 mux MIR B bus 0 1 mprogram Instruction Register C bus H Next add ncvz EN Shift ALU Compare ncvz from ALU with required pattern from minstruction Jump if they match c n z v ALU control ALU 4 Shift bits and (pairwise) Shift control Shifter ncvz (from ALU) Anatomy of Modern Processors

  23. CISC / RISC • CISC machines are microcoded • Instructions can be quite complex • Implemented with long microcode programs! • RISC machines • Instructions themselves control data path • At most one level of indirection • Opcode effectively translated to data path control bits via a single look up table LUT Opcode r0 r1 r2 Data path elements ALU Registers O’put En Shift op Shift count 01011011 Anatomy of Modern Processors

  24. A Java Machine • Context for an executing Java program • Constant Pool • Collection of constants used by this program • Local Variable Frame • Each method has access to a set of local variables • public int getRadius( float x, float y ) { float r; r = x*x + y*y; return r; } • Stack Pointer • Points to stack frame containing • Local variables • Arguments Local variable Anatomy of Modern Processors

  25. CPP SP LV PC Environment for a running Java program Moves up and down during executionof a method asoperands are pushedand popped Current Operand Stack 3 Current Local Variable Stack 3 ConstantPool Method Code Current Operand Stack 2 Current Local Variable Stack 2 Current Operand Stack 1 Anatomy of Modern Processors

  26. MAR EN EN EN EN EN EN EN OE OE OE OE OE OE A (Simple) Java Machine • Add CPP, SP, LVregisters! MDR MainMemory EN PC CPP MIR B bus C bus SP H c n z v ALU control LV ALU 4 Shifter Anatomy of Modern Processors

  27. Java Instructions Encoding Mnemonic Explanation0x10 BIPUSH byte Push byte 0x59 DUP Copy TOS and push 0xA7 GOTO offset Jump to PC+offset 0x60 IADD Add TOS, TOS-1 0x84 IINC var const Add const to LV number var 0x57 POP Delete TOS0x13 LDC_W index Push consant index 0xAC IRETURN Return from method with integer value Some operations need additionalbytes for arguments Opcodes are all 1 byte Anatomy of Modern Processors

  28. Java Machine • Tanenbaum (§ 4.3.2) gives the full mcode for implementing the operations listed in his table • It’s surprisingly short! • You don’t need to learn it ..but you should be able to understand it! Anatomy of Modern Processors

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